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author | Atish Patra <atishp@rivosinc.com> | 2024-04-20 08:17:20 -0700 |
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committer | Anup Patel <anup@brainfault.org> | 2024-04-22 11:13:48 +0530 |
commit | c69f9cb0595ff91759b1ff361d19068e16574229 (patch) | |
tree | 83761817412bb2aadcab551f5695c40df96d8bc8 /drivers/perf/riscv_pmu_sbi.c | |
parent | 7dda24bacc05ae4e43b75aab347e4df07e002502 (diff) | |
download | lwn-c69f9cb0595ff91759b1ff361d19068e16574229.tar.gz lwn-c69f9cb0595ff91759b1ff361d19068e16574229.zip |
drivers/perf: riscv: Use BIT macro for shifting operations
It is a good practice to use BIT() instead of (1 << x).
Replace the current usages with BIT().
Take this opportunity to replace few (1UL << x) with BIT() as well
for consistency.
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
Acked-by: Palmer Dabbelt <palmer@rivosinc.com>
Signed-off-by: Atish Patra <atishp@rivosinc.com>
Link: https://lore.kernel.org/r/20240420151741.962500-5-atishp@rivosinc.com
Signed-off-by: Anup Patel <anup@brainfault.org>
Diffstat (limited to 'drivers/perf/riscv_pmu_sbi.c')
-rw-r--r-- | drivers/perf/riscv_pmu_sbi.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/perf/riscv_pmu_sbi.c b/drivers/perf/riscv_pmu_sbi.c index 1823ffb25d35..f23501898657 100644 --- a/drivers/perf/riscv_pmu_sbi.c +++ b/drivers/perf/riscv_pmu_sbi.c @@ -386,7 +386,7 @@ static int pmu_sbi_ctr_get_idx(struct perf_event *event) cmask = 1; } else if (event->attr.config == PERF_COUNT_HW_INSTRUCTIONS) { cflags |= SBI_PMU_CFG_FLAG_SKIP_MATCH; - cmask = 1UL << (CSR_INSTRET - CSR_CYCLE); + cmask = BIT(CSR_INSTRET - CSR_CYCLE); } } |