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authorMarc Zyngier <maz@kernel.org>2022-02-08 18:56:03 +0000
committerWill Deacon <will@kernel.org>2022-03-08 13:32:48 +0000
commit1280f12f56a15abde23503ba876343e5f201c9c2 (patch)
tree490142c08c420d91ffecf9d5d9d4cfe6783ca1ea /drivers/perf/arm_pmu.c
parent47804aab73d85147b9110a8cb025e01f8638e77d (diff)
downloadlwn-1280f12f56a15abde23503ba876343e5f201c9c2.tar.gz
lwn-1280f12f56a15abde23503ba876343e5f201c9c2.zip
drivers/perf: arm_pmu: Handle 47 bit counters
The current ARM PMU framework can only deal with 32 or 64bit counters. Teach it about a 47bit flavour. Yes, this is odd. Reviewed-by: Hector Martin <marcan@marcan.st> Signed-off-by: Marc Zyngier <maz@kernel.org> Signed-off-by: Will Deacon <will@kernel.org>
Diffstat (limited to 'drivers/perf/arm_pmu.c')
-rw-r--r--drivers/perf/arm_pmu.c2
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/perf/arm_pmu.c b/drivers/perf/arm_pmu.c
index 295cc7952d0e..0a9ed1a061ac 100644
--- a/drivers/perf/arm_pmu.c
+++ b/drivers/perf/arm_pmu.c
@@ -109,6 +109,8 @@ static inline u64 arm_pmu_event_max_period(struct perf_event *event)
{
if (event->hw.flags & ARMPMU_EVT_64BIT)
return GENMASK_ULL(63, 0);
+ else if (event->hw.flags & ARMPMU_EVT_47BIT)
+ return GENMASK_ULL(46, 0);
else
return GENMASK_ULL(31, 0);
}