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authorTony Luck <tony.luck@intel.com>2007-06-28 16:05:34 -0700
committerTony Luck <tony.luck@intel.com>2007-07-09 10:30:28 -0700
commit83ce6ef8408bbc7d9322ab50ba592f83012dea94 (patch)
tree46fe432c39860e7b46d622ab306494613b29b8ae /drivers/pci/rom.c
parent7dcca30a32aadb0520417521b0c44f42d09fe05c (diff)
downloadlwn-83ce6ef8408bbc7d9322ab50ba592f83012dea94.tar.gz
lwn-83ce6ef8408bbc7d9322ab50ba592f83012dea94.zip
[IA64] Don't set psr.ic and psr.i simultaneously
It's not a good idea to use "ssm psr.ic | psr.i" to simultaneously enable interrupts and interrupt state collection, the two bits can take effect asynchronously, so it is possible for an interrupt to be serviced while psr.ic is still zero. Signed-off-by: Tony Luck <tony.luck@intel.com>
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