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| author | Yicong Yang <yangyicong@hisilicon.com> | 2020-02-17 19:12:55 +0800 |
|---|---|---|
| committer | Bjorn Helgaas <bhelgaas@google.com> | 2020-02-28 17:38:30 -0600 |
| commit | 9cb3985af63555810bb07de50acdf4170771451d (patch) | |
| tree | 17267189c9e951f0948ffcfeb3729d204df7e6a2 /drivers/pci/pci.h | |
| parent | bb6d3fb354c5ee8d6bde2d576eb7220ea09862b9 (diff) | |
| download | lwn-9cb3985af63555810bb07de50acdf4170771451d.tar.gz lwn-9cb3985af63555810bb07de50acdf4170771451d.zip | |
PCI: Add 32 GT/s decoding in some macros
Link speed 32.0 GT/s is supported in PCIe r5.0. Add this speed to
PCIE_SPEED2STR() and PCIE_SPEED2MBS_ENC() to correctly decode it.
This is complementary to de76cda215d5 ("PCI: Decode PCIe 32 GT/s link
speed").
Link: https://lore.kernel.org/r/1581937984-40353-2-git-send-email-yangyicong@hisilicon.com
Signed-off-by: Yicong Yang <yangyicong@hisilicon.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Diffstat (limited to 'drivers/pci/pci.h')
| -rw-r--r-- | drivers/pci/pci.h | 6 |
1 files changed, 4 insertions, 2 deletions
diff --git a/drivers/pci/pci.h b/drivers/pci/pci.h index 6394e7746fb5..f65912e0f30d 100644 --- a/drivers/pci/pci.h +++ b/drivers/pci/pci.h @@ -294,7 +294,8 @@ void pci_bus_put(struct pci_bus *bus); /* PCIe link information */ #define PCIE_SPEED2STR(speed) \ - ((speed) == PCIE_SPEED_16_0GT ? "16 GT/s" : \ + ((speed) == PCIE_SPEED_32_0GT ? "32 GT/s" : \ + (speed) == PCIE_SPEED_16_0GT ? "16 GT/s" : \ (speed) == PCIE_SPEED_8_0GT ? "8 GT/s" : \ (speed) == PCIE_SPEED_5_0GT ? "5 GT/s" : \ (speed) == PCIE_SPEED_2_5GT ? "2.5 GT/s" : \ @@ -302,7 +303,8 @@ void pci_bus_put(struct pci_bus *bus); /* PCIe speed to Mb/s reduced by encoding overhead */ #define PCIE_SPEED2MBS_ENC(speed) \ - ((speed) == PCIE_SPEED_16_0GT ? 16000*128/130 : \ + ((speed) == PCIE_SPEED_32_0GT ? 32000*128/130 : \ + (speed) == PCIE_SPEED_16_0GT ? 16000*128/130 : \ (speed) == PCIE_SPEED_8_0GT ? 8000*128/130 : \ (speed) == PCIE_SPEED_5_0GT ? 5000*8/10 : \ (speed) == PCIE_SPEED_2_5GT ? 2500*8/10 : \ |