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| author | Yicong Yang <yangyicong@hisilicon.com> | 2020-02-17 19:13:03 +0800 |
|---|---|---|
| committer | Bjorn Helgaas <bhelgaas@google.com> | 2020-03-10 14:06:20 -0500 |
| commit | 757bfaa2c3515803dde9a6728bbf8c8a3c5f098a (patch) | |
| tree | f6d8492c90942182b727ee9e89137036a87a2942 /drivers/pci/pci.h | |
| parent | 6348a34dcb98d8e285685a205f2a601817fa2d38 (diff) | |
| download | lwn-757bfaa2c3515803dde9a6728bbf8c8a3c5f098a.tar.gz lwn-757bfaa2c3515803dde9a6728bbf8c8a3c5f098a.zip | |
PCI: Add PCIE_LNKCAP2_SLS2SPEED() macro
Add PCIE_LNKCAP2_SLS2SPEED macro for transforming raw Link Capabilities 2
values to the pci_bus_speed. This is next to PCIE_SPEED2MBS_ENC() to make
it easier to update both places when adding support for new speeds.
Link: https://lore.kernel.org/r/1581937984-40353-10-git-send-email-yangyicong@hisilicon.com
Signed-off-by: Yicong Yang <yangyicong@hisilicon.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Diffstat (limited to 'drivers/pci/pci.h')
| -rw-r--r-- | drivers/pci/pci.h | 9 |
1 files changed, 9 insertions, 0 deletions
diff --git a/drivers/pci/pci.h b/drivers/pci/pci.h index 01f5d7f449a5..75d027ecfbcd 100644 --- a/drivers/pci/pci.h +++ b/drivers/pci/pci.h @@ -292,6 +292,15 @@ void pci_disable_bridge_window(struct pci_dev *dev); struct pci_bus *pci_bus_get(struct pci_bus *bus); void pci_bus_put(struct pci_bus *bus); +/* PCIe link information from Link Capabilities 2 */ +#define PCIE_LNKCAP2_SLS2SPEED(lnkcap2) \ + ((lnkcap2) & PCI_EXP_LNKCAP2_SLS_32_0GB ? PCIE_SPEED_32_0GT : \ + (lnkcap2) & PCI_EXP_LNKCAP2_SLS_16_0GB ? PCIE_SPEED_16_0GT : \ + (lnkcap2) & PCI_EXP_LNKCAP2_SLS_8_0GB ? PCIE_SPEED_8_0GT : \ + (lnkcap2) & PCI_EXP_LNKCAP2_SLS_5_0GB ? PCIE_SPEED_5_0GT : \ + (lnkcap2) & PCI_EXP_LNKCAP2_SLS_2_5GB ? PCIE_SPEED_2_5GT : \ + PCI_SPEED_UNKNOWN) + /* PCIe speed to Mb/s reduced by encoding overhead */ #define PCIE_SPEED2MBS_ENC(speed) \ ((speed) == PCIE_SPEED_32_0GT ? 32000*128/130 : \ |