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| author | David Woodhouse <David.Woodhouse@intel.com> | 2009-09-19 07:34:04 -0700 |
|---|---|---|
| committer | David Woodhouse <David.Woodhouse@intel.com> | 2009-09-19 07:34:04 -0700 |
| commit | 2ebe31513fcbe7a781f27002f065b50ae195022f (patch) | |
| tree | e593fd5e1a2f952c768e7c235f9a25771a6ea59e /drivers/pci/intel-iommu.c | |
| parent | 074835f0143b83845af5044af2739c52c9f53808 (diff) | |
| download | lwn-2ebe31513fcbe7a781f27002f065b50ae195022f.tar.gz lwn-2ebe31513fcbe7a781f27002f065b50ae195022f.zip | |
intel-iommu: Limit DOMAIN_MAX_PFN to fit in an 'unsigned long'
This means we're limited to 44-bit addresses on 32-bit kernels, and
makes it sane for us to use 'unsigned long' for PFNs throughout.
Which is just as well, really, since we already do that.
Reported-by: Benjamin LaHaise <ben.lahaise@neterion.com>
Tested-by: Benjamin LaHaise <ben.lahaise@neterion.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
Diffstat (limited to 'drivers/pci/intel-iommu.c')
| -rw-r--r-- | drivers/pci/intel-iommu.c | 10 |
1 files changed, 8 insertions, 2 deletions
diff --git a/drivers/pci/intel-iommu.c b/drivers/pci/intel-iommu.c index 2ec5899207e3..c9272a1fb691 100644 --- a/drivers/pci/intel-iommu.c +++ b/drivers/pci/intel-iommu.c @@ -56,8 +56,14 @@ #define MAX_AGAW_WIDTH 64 -#define DOMAIN_MAX_ADDR(gaw) ((((u64)1) << gaw) - 1) -#define DOMAIN_MAX_PFN(gaw) ((((u64)1) << (gaw-VTD_PAGE_SHIFT)) - 1) +#define __DOMAIN_MAX_PFN(gaw) ((((uint64_t)1) << (gaw-VTD_PAGE_SHIFT)) - 1) +#define __DOMAIN_MAX_ADDR(gaw) ((((uint64_t)1) << gaw) - 1) + +/* We limit DOMAIN_MAX_PFN to fit in an unsigned long, and DOMAIN_MAX_ADDR + to match. That way, we can use 'unsigned long' for PFNs with impunity. */ +#define DOMAIN_MAX_PFN(gaw) ((unsigned long) min_t(uint64_t, \ + __DOMAIN_MAX_PFN(gaw), (unsigned long)-1)) +#define DOMAIN_MAX_ADDR(gaw) (((uint64_t)__DOMAIN_MAX_PFN(gaw)) << VTD_PAGE_SHIFT) #define IOVA_PFN(addr) ((addr) >> PAGE_SHIFT) #define DMA_32BIT_PFN IOVA_PFN(DMA_BIT_MASK(32)) |