diff options
| author | Kenji Kaneshige <kaneshige.kenji@jp.fujitsu.com> | 2006-12-21 17:01:09 -0800 |
|---|---|---|
| committer | Greg Kroah-Hartman <gregkh@suse.de> | 2007-02-07 15:50:05 -0800 |
| commit | 44ef4cefb0168740184ee3d7d18254339741e9d5 (patch) | |
| tree | 9ae7d2d94c6bec9fe1b6c0a9ddf7e78994ea4dc9 /drivers/pci/hotplug/pciehp_hpc.c | |
| parent | 75e13178af33e20b5802885f637af2a82c64ac2c (diff) | |
| download | lwn-44ef4cefb0168740184ee3d7d18254339741e9d5.tar.gz lwn-44ef4cefb0168740184ee3d7d18254339741e9d5.zip | |
pciehp: cleanup wait command completion
This patch cleans up the code to wait for command completion.
Signed-off-by: Kenji Kaneshige <kaneshige.kenji@jp.fujitsu.com>
Signed-off-by: Kristen Carlson Accardi <kristen.c.accardi@intel.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
Diffstat (limited to 'drivers/pci/hotplug/pciehp_hpc.c')
| -rw-r--r-- | drivers/pci/hotplug/pciehp_hpc.c | 38 |
1 files changed, 33 insertions, 5 deletions
diff --git a/drivers/pci/hotplug/pciehp_hpc.c b/drivers/pci/hotplug/pciehp_hpc.c index d8f4f1241b56..9fbd9b9f9824 100644 --- a/drivers/pci/hotplug/pciehp_hpc.c +++ b/drivers/pci/hotplug/pciehp_hpc.c @@ -249,6 +249,24 @@ static void start_int_poll_timer(struct controller *ctrl, int sec) add_timer(&ctrl->poll_timer); } +static inline int pcie_wait_cmd(struct controller *ctrl) +{ + DECLARE_WAITQUEUE(wait, current); + + add_wait_queue(&ctrl->queue, &wait); + if (!pciehp_poll_mode) + /* Sleep for up to 1 second */ + msleep_interruptible(1000); + else + msleep_interruptible(2500); + + remove_wait_queue(&ctrl->queue, &wait); + if (signal_pending(current)) + return -EINTR; + + return 0; +} + static int pcie_write_cmd(struct slot *slot, u16 cmd) { struct controller *ctrl = slot->ctrl; @@ -257,24 +275,34 @@ static int pcie_write_cmd(struct slot *slot, u16 cmd) DBG_ENTER_ROUTINE + mutex_lock(&ctrl->ctrl_lock); + retval = pciehp_readw(ctrl, SLOTSTATUS, &slot_status); if (retval) { err("%s: Cannot read SLOTSTATUS register\n", __FUNCTION__); - return retval; + goto out; } if ((slot_status & CMD_COMPLETED) == CMD_COMPLETED ) { - /* After 1 sec and CMD_COMPLETED still not set, just proceed forward to issue - the next command according to spec. Just print out the error message */ - dbg("%s : CMD_COMPLETED not clear after 1 sec.\n", __FUNCTION__); + /* After 1 sec and CMD_COMPLETED still not set, just + proceed forward to issue the next command according + to spec. Just print out the error message */ + dbg("%s: CMD_COMPLETED not clear after 1 sec.\n", + __FUNCTION__); } retval = pciehp_writew(ctrl, SLOTCTRL, (cmd | CMD_CMPL_INTR_ENABLE)); if (retval) { err("%s: Cannot write to SLOTCTRL register\n", __FUNCTION__); - return retval; + goto out; } + /* + * Wait for command completion. + */ + retval = pcie_wait_cmd(ctrl); + out: + mutex_unlock(&ctrl->ctrl_lock); DBG_LEAVE_ROUTINE return retval; } |