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author | Paul Burton <paul.burton@imgtec.com> | 2017-08-15 16:24:38 -0500 |
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committer | Bjorn Helgaas <bhelgaas@google.com> | 2017-08-16 11:41:20 -0500 |
commit | bfdbbf0e3c2a6e3fe752e0dc858c982aa1ccecad (patch) | |
tree | 73308f15ba5958111341acbc2fe25a1439467109 /drivers/pci/host/pcie-altera.c | |
parent | 8a3073860b7389ee4b6754961b05e15187dac33b (diff) | |
download | lwn-bfdbbf0e3c2a6e3fe752e0dc858c982aa1ccecad.tar.gz lwn-bfdbbf0e3c2a6e3fe752e0dc858c982aa1ccecad.zip |
PCI: altera: Use size=4 IRQ domain for legacy INTx
The devicetree binding documentation for the Altera PCIe controller shows
an example which uses an interrupt-map property to map PCI INTx interrupts
to hardware IRQ numbers 1-4. The driver creates an IRQ domain with size 5
in order to cover this range, with hwirq=0 left unused.
This patch cleans up this wasted IRQ domain entry, modifying the driver to
use an IRQ domain of size 4 which matches the actual number of PCI INTx
interrupts. Since the hwirq numbers 1-4 are part of the devicetree binding,
and this is considered ABI, we cannot simply change the interrupt-map
property to use the range 0-3. Instead we make use of the
pci_irqd_intx_xlate() helper function to translate the range 1-4 used at
the DT level into the range 0-3 which is now used within the driver, and
stop adding 1 to decoded hwirq numbers in altera_pcie_isr().
Whilst cleaning up INTx handling we make use of the new PCI_NUM_INTX macro
& drop the custom INTX_NUM definition.
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Cc: Ley Foon Tan <lftan@altera.com>
Diffstat (limited to 'drivers/pci/host/pcie-altera.c')
-rw-r--r-- | drivers/pci/host/pcie-altera.c | 9 |
1 files changed, 4 insertions, 5 deletions
diff --git a/drivers/pci/host/pcie-altera.c b/drivers/pci/host/pcie-altera.c index 4ea4f8f5dc77..6fced590eb87 100644 --- a/drivers/pci/host/pcie-altera.c +++ b/drivers/pci/host/pcie-altera.c @@ -76,8 +76,6 @@ #define LINK_UP_TIMEOUT HZ #define LINK_RETRAIN_TIMEOUT HZ -#define INTX_NUM 4 - #define DWORD_MASK 3 struct altera_pcie { @@ -464,6 +462,7 @@ static int altera_pcie_intx_map(struct irq_domain *domain, unsigned int irq, static const struct irq_domain_ops intx_domain_ops = { .map = altera_pcie_intx_map, + .xlate = pci_irqd_intx_xlate, }; static void altera_pcie_isr(struct irq_desc *desc) @@ -481,11 +480,11 @@ static void altera_pcie_isr(struct irq_desc *desc) while ((status = cra_readl(pcie, P2A_INT_STATUS) & P2A_INT_STS_ALL) != 0) { - for_each_set_bit(bit, &status, INTX_NUM) { + for_each_set_bit(bit, &status, PCI_NUM_INTX) { /* clear interrupts */ cra_writel(pcie, 1 << bit, P2A_INT_STATUS); - virq = irq_find_mapping(pcie->irq_domain, bit + 1); + virq = irq_find_mapping(pcie->irq_domain, bit); if (virq) generic_handle_irq(virq); else @@ -536,7 +535,7 @@ static int altera_pcie_init_irq_domain(struct altera_pcie *pcie) struct device_node *node = dev->of_node; /* Setup INTx */ - pcie->irq_domain = irq_domain_add_linear(node, INTX_NUM + 1, + pcie->irq_domain = irq_domain_add_linear(node, PCI_NUM_INTX, &intx_domain_ops, pcie); if (!pcie->irq_domain) { dev_err(dev, "Failed to get a INTx IRQ domain\n"); |