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authorLucas Stach <l.stach@pengutronix.de>2015-09-18 13:58:35 -0500
committerBjorn Helgaas <bhelgaas@google.com>2015-09-18 13:58:35 -0500
commit98a97e6fe9eb20e877a82d0149ce6d8f832c8975 (patch)
tree713610a047b895f1758c671db2494e97c4edc5c5 /drivers/pci/host/pci-keystone-dw.c
parent79707374090411c5fa9dbcde862e59306bf8f765 (diff)
downloadlwn-98a97e6fe9eb20e877a82d0149ce6d8f832c8975.tar.gz
lwn-98a97e6fe9eb20e877a82d0149ce6d8f832c8975.zip
PCI: designware: Make get_msi_addr() return phys_addr_t, not u32
Make get_msi_addr() return phys_addr_t, not u32. This allows the MSI target address to be above 4GB for 64bit or PAE systems. No functional change for the current 32bit platform users as phys_addr_t maps to u32 for them. [bhelgaas: changelog] Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Pratyush Anand <pratyush.anand@gmail.com>
Diffstat (limited to 'drivers/pci/host/pci-keystone-dw.c')
-rw-r--r--drivers/pci/host/pci-keystone-dw.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/pci/host/pci-keystone-dw.c b/drivers/pci/host/pci-keystone-dw.c
index e71da991949b..3cf55cdb7f87 100644
--- a/drivers/pci/host/pci-keystone-dw.c
+++ b/drivers/pci/host/pci-keystone-dw.c
@@ -70,7 +70,7 @@ static inline void update_reg_offset_bit_pos(u32 offset, u32 *reg_offset,
*bit_pos = offset >> 3;
}
-u32 ks_dw_pcie_get_msi_addr(struct pcie_port *pp)
+phys_addr_t ks_dw_pcie_get_msi_addr(struct pcie_port *pp)
{
struct keystone_pcie *ks_pcie = to_keystone_pcie(pp);