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author | Rafał Miłecki <zajec5@gmail.com> | 2014-08-07 07:45:37 +0200 |
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committer | John W. Linville <linville@tuxdriver.com> | 2014-08-25 16:00:42 -0400 |
commit | 25c15566635fef86e87f762f73a19f24598e45fa (patch) | |
tree | 553e99060b077c95aa0096b1351e480219ccbfa5 /drivers/net/wireless/b43/phy_lp.c | |
parent | d342b95dd735014a590f9051b1ba227eb54ca8f6 (diff) | |
download | lwn-25c15566635fef86e87f762f73a19f24598e45fa.tar.gz lwn-25c15566635fef86e87f762f73a19f24598e45fa.zip |
b43: flush some writes on Broadcom MIPS SoCs
Access to PHY and radio registers is indirect on Broadcom hardware and
it seems that addressing on some MIPS SoCs may require flushing. So far
this problem was noticed on 0x4716 SoC only (marketing names: BCM4717,
BCM4718).
Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
Diffstat (limited to 'drivers/net/wireless/b43/phy_lp.c')
-rw-r--r-- | drivers/net/wireless/b43/phy_lp.c | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/drivers/net/wireless/b43/phy_lp.c b/drivers/net/wireless/b43/phy_lp.c index 1e9bae68b621..058a9f232050 100644 --- a/drivers/net/wireless/b43/phy_lp.c +++ b/drivers/net/wireless/b43/phy_lp.c @@ -1988,7 +1988,7 @@ static void lpphy_calibration(struct b43_wldev *dev) static void b43_lpphy_op_maskset(struct b43_wldev *dev, u16 reg, u16 mask, u16 set) { - b43_write16(dev, B43_MMIO_PHY_CONTROL, reg); + b43_write16f(dev, B43_MMIO_PHY_CONTROL, reg); b43_write16(dev, B43_MMIO_PHY_DATA, (b43_read16(dev, B43_MMIO_PHY_DATA) & mask) | set); } @@ -2004,7 +2004,7 @@ static u16 b43_lpphy_op_radio_read(struct b43_wldev *dev, u16 reg) } else reg |= 0x200; - b43_write16(dev, B43_MMIO_RADIO_CONTROL, reg); + b43_write16f(dev, B43_MMIO_RADIO_CONTROL, reg); return b43_read16(dev, B43_MMIO_RADIO_DATA_LOW); } @@ -2013,7 +2013,7 @@ static void b43_lpphy_op_radio_write(struct b43_wldev *dev, u16 reg, u16 value) /* Register 1 is a 32-bit register. */ B43_WARN_ON(reg == 1); - b43_write16(dev, B43_MMIO_RADIO_CONTROL, reg); + b43_write16f(dev, B43_MMIO_RADIO_CONTROL, reg); b43_write16(dev, B43_MMIO_RADIO_DATA_LOW, value); } |