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| author | Felix Fietkau <nbd@openwrt.org> | 2011-03-23 20:57:25 +0100 |
|---|---|---|
| committer | John W. Linville <linville@tuxdriver.com> | 2011-03-30 14:15:19 -0400 |
| commit | 845e03c93dda2c00ffb5c68a1f7c8efc412d7c1a (patch) | |
| tree | 9c48d7b82ef167d9346ef1a3689f636a471c14f2 /drivers/net/wireless/ath/ath9k/hw.h | |
| parent | f9f84e96f6d642aa7b337c22cbb7d6f936039fda (diff) | |
| download | lwn-845e03c93dda2c00ffb5c68a1f7c8efc412d7c1a.tar.gz lwn-845e03c93dda2c00ffb5c68a1f7c8efc412d7c1a.zip | |
ath9k_hw: add a new register op for read-mask-write
Reduces the number of calls to register ops. On MIPS this reduces the
ath9k_hw binary size from 321k down to 310k
Signed-off-by: Felix Fietkau <nbd@openwrt.org>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
Diffstat (limited to 'drivers/net/wireless/ath/ath9k/hw.h')
| -rw-r--r-- | drivers/net/wireless/ath/ath9k/hw.h | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/drivers/net/wireless/ath/ath9k/hw.h b/drivers/net/wireless/ath/ath9k/hw.h index ef387a2f54b2..e256658c740a 100644 --- a/drivers/net/wireless/ath/ath9k/hw.h +++ b/drivers/net/wireless/ath/ath9k/hw.h @@ -73,6 +73,9 @@ #define REG_READ_MULTI(_ah, _addr, _val, _cnt) \ (_ah)->reg_ops.multi_read((_ah), (_addr), (_val), (_cnt)) +#define REG_RMW(_ah, _reg, _set, _clr) \ + (_ah)->reg_ops.rmw((_ah), (_reg), (_set), (_clr)) + #define ENABLE_REGWRITE_BUFFER(_ah) \ do { \ if ((_ah)->reg_ops.enable_write_buffer) \ @@ -87,17 +90,14 @@ #define SM(_v, _f) (((_v) << _f##_S) & _f) #define MS(_v, _f) (((_v) & _f) >> _f##_S) -#define REG_RMW(_a, _r, _set, _clr) \ - REG_WRITE(_a, _r, (REG_READ(_a, _r) & ~(_clr)) | (_set)) #define REG_RMW_FIELD(_a, _r, _f, _v) \ - REG_WRITE(_a, _r, \ - (REG_READ(_a, _r) & ~_f) | (((_v) << _f##_S) & _f)) + REG_RMW(_a, _r, (((_v) << _f##_S) & _f), (_f)) #define REG_READ_FIELD(_a, _r, _f) \ (((REG_READ(_a, _r) & _f) >> _f##_S)) #define REG_SET_BIT(_a, _r, _f) \ - REG_WRITE(_a, _r, REG_READ(_a, _r) | (_f)) + REG_RMW(_a, _r, (_f), 0) #define REG_CLR_BIT(_a, _r, _f) \ - REG_WRITE(_a, _r, REG_READ(_a, _r) & ~(_f)) + REG_RMW(_a, _r, 0, (_f)) #define DO_DELAY(x) do { \ if (((++(x) % 64) == 0) && \ |