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authorFelix Fietkau <nbd@openwrt.org>2010-04-26 15:04:35 -0400
committerJohn W. Linville <linville@tuxdriver.com>2010-04-27 16:09:18 -0400
commit6b42e8d03bef975085c0397806d00fbd1df67eb8 (patch)
tree42ddfa6f922ad677ee55355822c555de2a11cb10 /drivers/net/wireless/ath/ath9k/hw.h
parent5b75d0fca5b8cd2657fb240f2112e272a115b2f9 (diff)
downloadlwn-6b42e8d03bef975085c0397806d00fbd1df67eb8.tar.gz
lwn-6b42e8d03bef975085c0397806d00fbd1df67eb8.zip
ath9k_hw: fix fast clock handling for 5GHz channels
Combine multiple checks that were supposed to check for the same conditions, but didn't. Always enable fast PLL clock on AR9280 2.0 Signed-off-by: Felix Fietkau <nbd@openwrt.org> Signed-off-by: John W. Linville <linville@tuxdriver.com>
Diffstat (limited to 'drivers/net/wireless/ath/ath9k/hw.h')
-rw-r--r--drivers/net/wireless/ath/ath9k/hw.h5
1 files changed, 2 insertions, 3 deletions
diff --git a/drivers/net/wireless/ath/ath9k/hw.h b/drivers/net/wireless/ath/ath9k/hw.h
index 7a1347b2453f..bc682da28b2a 100644
--- a/drivers/net/wireless/ath/ath9k/hw.h
+++ b/drivers/net/wireless/ath/ath9k/hw.h
@@ -369,10 +369,9 @@ struct ath9k_channel {
#define IS_CHAN_2GHZ(_c) (((_c)->channelFlags & CHANNEL_2GHZ) != 0)
#define IS_CHAN_HALF_RATE(_c) (((_c)->channelFlags & CHANNEL_HALF) != 0)
#define IS_CHAN_QUARTER_RATE(_c) (((_c)->channelFlags & CHANNEL_QUARTER) != 0)
-#define IS_CHAN_A_5MHZ_SPACED(_c) \
+#define IS_CHAN_A_FAST_CLOCK(_ah, _c) \
((((_c)->channelFlags & CHANNEL_5GHZ) != 0) && \
- (((_c)->channel % 20) != 0) && \
- (((_c)->channel % 10) != 0))
+ ((_ah)->caps.hw_caps & ATH9K_HW_CAP_FASTCLOCK))
/* These macros check chanmode and not channelFlags */
#define IS_CHAN_B(_c) ((_c)->chanmode == CHANNEL_B)