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authorFelix Fietkau <nbd@openwrt.org>2010-09-14 20:22:44 +0200
committerJohn W. Linville <linville@tuxdriver.com>2010-09-14 16:14:27 -0400
commit364734fafbba0c3133e482db78149b9a823ae7a5 (patch)
treef41e8faacdc270a7ad28ee51ae56edc6989c7675 /drivers/net/wireless/ath/ath9k/hw.h
parent3ae74c33c4f799f6bf6d67240a94a0814a8f1944 (diff)
downloadlwn-364734fafbba0c3133e482db78149b9a823ae7a5.tar.gz
lwn-364734fafbba0c3133e482db78149b9a823ae7a5.zip
ath9k_hw: remove useless hw capability flags
Signed-off-by: Felix Fietkau <nbd@openwrt.org> Signed-off-by: John W. Linville <linville@tuxdriver.com>
Diffstat (limited to 'drivers/net/wireless/ath/ath9k/hw.h')
-rw-r--r--drivers/net/wireless/ath/ath9k/hw.h37
1 files changed, 13 insertions, 24 deletions
diff --git a/drivers/net/wireless/ath/ath9k/hw.h b/drivers/net/wireless/ath/ath9k/hw.h
index 1724b17bfc73..a3c2ce235123 100644
--- a/drivers/net/wireless/ath/ath9k/hw.h
+++ b/drivers/net/wireless/ath/ath9k/hw.h
@@ -181,30 +181,19 @@ enum wireless_mode {
};
enum ath9k_hw_caps {
- ATH9K_HW_CAP_MIC_AESCCM = BIT(0),
- ATH9K_HW_CAP_MIC_CKIP = BIT(1),
- ATH9K_HW_CAP_MIC_TKIP = BIT(2),
- ATH9K_HW_CAP_CIPHER_AESCCM = BIT(3),
- ATH9K_HW_CAP_CIPHER_CKIP = BIT(4),
- ATH9K_HW_CAP_CIPHER_TKIP = BIT(5),
- ATH9K_HW_CAP_VEOL = BIT(6),
- ATH9K_HW_CAP_BSSIDMASK = BIT(7),
- ATH9K_HW_CAP_MCAST_KEYSEARCH = BIT(8),
- ATH9K_HW_CAP_HT = BIT(9),
- ATH9K_HW_CAP_GTT = BIT(10),
- ATH9K_HW_CAP_FASTCC = BIT(11),
- ATH9K_HW_CAP_RFSILENT = BIT(12),
- ATH9K_HW_CAP_CST = BIT(13),
- ATH9K_HW_CAP_ENHANCEDPM = BIT(14),
- ATH9K_HW_CAP_AUTOSLEEP = BIT(15),
- ATH9K_HW_CAP_4KB_SPLITTRANS = BIT(16),
- ATH9K_HW_CAP_EDMA = BIT(17),
- ATH9K_HW_CAP_RAC_SUPPORTED = BIT(18),
- ATH9K_HW_CAP_LDPC = BIT(19),
- ATH9K_HW_CAP_FASTCLOCK = BIT(20),
- ATH9K_HW_CAP_SGI_20 = BIT(21),
- ATH9K_HW_CAP_PAPRD = BIT(22),
- ATH9K_HW_CAP_ANT_DIV_COMB = BIT(23),
+ ATH9K_HW_CAP_HT = BIT(0),
+ ATH9K_HW_CAP_RFSILENT = BIT(1),
+ ATH9K_HW_CAP_CST = BIT(2),
+ ATH9K_HW_CAP_ENHANCEDPM = BIT(3),
+ ATH9K_HW_CAP_AUTOSLEEP = BIT(4),
+ ATH9K_HW_CAP_4KB_SPLITTRANS = BIT(5),
+ ATH9K_HW_CAP_EDMA = BIT(6),
+ ATH9K_HW_CAP_RAC_SUPPORTED = BIT(7),
+ ATH9K_HW_CAP_LDPC = BIT(8),
+ ATH9K_HW_CAP_FASTCLOCK = BIT(9),
+ ATH9K_HW_CAP_SGI_20 = BIT(10),
+ ATH9K_HW_CAP_PAPRD = BIT(11),
+ ATH9K_HW_CAP_ANT_DIV_COMB = BIT(12),
};
struct ath9k_hw_capabilities {