diff options
| author | Luis R. Rodriguez <lrodriguez@atheros.com> | 2009-09-13 22:05:04 -0700 |
|---|---|---|
| committer | John W. Linville <linville@tuxdriver.com> | 2009-10-07 16:39:29 -0400 |
| commit | 6420014ca4a6b0e853c9a19a8649d93682a5bdac (patch) | |
| tree | b6ef6935e9b7cc7be883b45dba00f8a981056670 /drivers/net/wireless/ath/ath9k/hw.c | |
| parent | 43c2761364b77cd7fd20eb1f14cfee4cd1462abd (diff) | |
| download | lwn-6420014ca4a6b0e853c9a19a8649d93682a5bdac.tar.gz lwn-6420014ca4a6b0e853c9a19a8649d93682a5bdac.zip | |
ath9k: remove ath9k 25 MHz HT40 spacing stuff
This was for supporting 25 MHz spacing for HT40, this is not used
as we use 20 MHz spacing instead for HT40 as per 802.11n. The hardware
is capable of it though so we leave the phymode definition and EEPROM
parsing for it. If some experimenter wants to work on this stuff stuff
you can add an extension enabling bool on ath_common and perhaps some
debugfs knob to enable it. Keep in mind you'll also need to update the
phymode with the AR_PHY_FC_DYN2040_EXT_CH which has been left on the
driver.
Signed-off-by: Luis R. Rodriguez <lrodriguez@atheros.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
Diffstat (limited to 'drivers/net/wireless/ath/ath9k/hw.c')
| -rw-r--r-- | drivers/net/wireless/ath/ath9k/hw.c | 8 |
1 files changed, 2 insertions, 6 deletions
diff --git a/drivers/net/wireless/ath/ath9k/hw.c b/drivers/net/wireless/ath/ath9k/hw.c index edf91d0fbb1a..6d2ac33a2764 100644 --- a/drivers/net/wireless/ath/ath9k/hw.c +++ b/drivers/net/wireless/ath/ath9k/hw.c @@ -213,10 +213,9 @@ void ath9k_hw_get_channel_centers(struct ath_hw *ah, centers->ctl_center = centers->synth_center - (extoff * HT40_CHANNEL_CENTER_SHIFT); + /* 25 MHz spacing is supported by hw but not on upper layers */ centers->ext_center = - centers->synth_center + (extoff * - ((ah->extprotspacing == ATH9K_HT_EXTPROTSPACING_20) ? - HT40_CHANNEL_CENTER_SHIFT : 15)); + centers->synth_center + (extoff * HT40_CHANNEL_CENTER_SHIFT); } /******************/ @@ -1759,8 +1758,6 @@ static void ath9k_hw_set_regs(struct ath_hw *ah, struct ath9k_channel *chan, (chan->chanmode == CHANNEL_G_HT40PLUS)) phymode |= AR_PHY_FC_DYN2040_PRI_CH; - if (ah->extprotspacing == ATH9K_HT_EXTPROTSPACING_25) - phymode |= AR_PHY_FC_DYN2040_EXT_CH; } REG_WRITE(ah, AR_PHY_TURBO, phymode); @@ -2333,7 +2330,6 @@ int ath9k_hw_reset(struct ath_hw *ah, struct ath9k_channel *chan, u64 tsf = 0; int i, rx_chainmask, r; - ah->extprotspacing = sc->ht_extprotspacing; ah->txchainmask = common->tx_chainmask; ah->rxchainmask = common->rx_chainmask; |