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| author | Ashok Raj Nagarajan <arnagara@qti.qualcomm.com> | 2017-02-01 00:06:51 +0530 |
|---|---|---|
| committer | Kalle Valo <kvalo@qca.qualcomm.com> | 2017-02-07 10:57:49 +0200 |
| commit | 7f622593cc5add77a99cd39404e8a851be9de792 (patch) | |
| tree | 3f55b05c53580b7ea64931d7d3f935a168654f92 /drivers/net/wireless/ath/ath10k/pci.h | |
| parent | cb4281528b62207918b1e95827cad7527aa4dbaa (diff) | |
| download | lwn-7f622593cc5add77a99cd39404e8a851be9de792.tar.gz lwn-7f622593cc5add77a99cd39404e8a851be9de792.zip | |
ath10k: fix reading sram contents for QCA4019
With QCA4019 platform, SRAM address can be accessed directly from host but
currently, we are assuming sram addresses cannot be accessed directly and
hence we convert the addresses.
While there, clean up growing hw checks during conversion of target CPU
address to CE address. Now we have function pointer pertaining to different
chips.
Signed-off-by: Ashok Raj Nagarajan <arnagara@qti.qualcomm.com>
Signed-off-by: Kalle Valo <kvalo@qca.qualcomm.com>
Diffstat (limited to 'drivers/net/wireless/ath/ath10k/pci.h')
| -rw-r--r-- | drivers/net/wireless/ath/ath10k/pci.h | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/drivers/net/wireless/ath/ath10k/pci.h b/drivers/net/wireless/ath/ath10k/pci.h index c76789d5de99..c1e08ad63940 100644 --- a/drivers/net/wireless/ath/ath10k/pci.h +++ b/drivers/net/wireless/ath/ath10k/pci.h @@ -233,6 +233,11 @@ struct ath10k_pci { /* Chip specific pci full reset function */ int (*pci_hard_reset)(struct ath10k *ar); + /* chip specific methods for converting target CPU virtual address + * space to CE address space + */ + u32 (*targ_cpu_to_ce_addr)(struct ath10k *ar, u32 addr); + /* Keep this entry in the last, memory for struct ath10k_ahb is * allocated (ahb support enabled case) in the continuation of * this struct. |