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authorMatt Carlson <mcarlson@broadcom.com>2010-09-15 08:59:53 +0000
committerDavid S. Miller <davem@davemloft.net>2010-09-15 14:16:10 -0700
commit41a8a7ee4a78216962f3afcea5968c04d0ab3b08 (patch)
tree9caf37cafecfabdce77b3af8c200bb1723201565 /drivers/net/tg3.h
parent21a4591794c82c1a73f9d45d6400f878648261e3 (diff)
downloadlwn-41a8a7ee4a78216962f3afcea5968c04d0ab3b08.tar.gz
lwn-41a8a7ee4a78216962f3afcea5968c04d0ab3b08.zip
tg3: Fix read DMA FIFO overruns on recent devices
Earlier versions of tg3 devices had a problem where the read DMA FIFO could be overrun in certain edge conditions. The fix was to limit the number of rx BDs the hardware would fetch at a time. For later devices (5761, 5784 and later ASIC revs), there is a hardware fix that must be enabled to fix the same problem. This patch adds that hardware fix. There is a gap in the ASIC revision lineage where neither fix is applied. This is intentional as these ASIC revisions are not afflicted by the bug. Reviewed-by: Benjamin Li <benli@broadcom.com> Reviewed-by: Michael Chan <mchan@broadcom.com> Signed-off-by: Matt Carlson <mcarlson@broadcom.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/tg3.h')
-rw-r--r--drivers/net/tg3.h6
1 files changed, 5 insertions, 1 deletions
diff --git a/drivers/net/tg3.h b/drivers/net/tg3.h
index 4937bd190964..783cd77b6165 100644
--- a/drivers/net/tg3.h
+++ b/drivers/net/tg3.h
@@ -1302,7 +1302,11 @@
#define RDMAC_STATUS_FIFOURUN 0x00000080
#define RDMAC_STATUS_FIFOOREAD 0x00000100
#define RDMAC_STATUS_LNGREAD 0x00000200
-/* 0x4808 --> 0x4c00 unused */
+/* 0x4808 --> 0x4900 unused */
+
+#define TG3_RDMA_RSRVCTRL_REG 0x00004900
+#define TG3_RDMA_RSRVCTRL_FIFO_OFLW_FIX 0x00000004
+/* 0x4904 --> 0x4c00 unused */
/* Write DMA control registers */
#define WDMAC_MODE 0x00004c00