diff options
| author | Matt Carlson <mcarlson@broadcom.com> | 2009-08-28 13:58:24 +0000 |
|---|---|---|
| committer | David S. Miller <davem@davemloft.net> | 2009-08-29 15:42:41 -0700 |
| commit | 8f666b07ac53eeedd6c035adf6d4299f9ed0df2d (patch) | |
| tree | a7c1b24da09573873097c33a25d25af2ea9206bc /drivers/net/tg3.c | |
| parent | fdb72b38c94c0ead1f78ecc8db64b832feda22c3 (diff) | |
| download | lwn-8f666b07ac53eeedd6c035adf6d4299f9ed0df2d.tar.gz lwn-8f666b07ac53eeedd6c035adf6d4299f9ed0df2d.zip | |
tg3: Move the JUMBO_CAPABLE and SUPPORT_MSI flags
This patch moves where the jumbo capable and msi support flags are
located. This is prep work for the addition of msix support flags.
Signed-off-by: Matt Carlson <mcarlson@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/tg3.c')
| -rw-r--r-- | drivers/net/tg3.c | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/drivers/net/tg3.c b/drivers/net/tg3.c index 606703cf9618..5e74a19e7c12 100644 --- a/drivers/net/tg3.c +++ b/drivers/net/tg3.c @@ -92,7 +92,7 @@ /* hardware minimum and maximum for a single frame's data payload */ #define TG3_MIN_MTU 60 #define TG3_MAX_MTU(tp) \ - ((tp->tg3_flags2 & TG3_FLG2_JUMBO_CAPABLE) ? 9000 : 1500) + ((tp->tg3_flags & TG3_FLAG_JUMBO_CAPABLE) ? 9000 : 1500) /* These numbers seem to be hard coded in the NIC firmware somehow. * You can't change the ring sizes, but you can change where you place @@ -1921,7 +1921,7 @@ out: if ((tp->phy_id & PHY_ID_MASK) == PHY_ID_BCM5401) { /* Cannot do read-modify-write on 5401 */ tg3_writephy(tp, MII_TG3_AUX_CTRL, 0x4c20); - } else if (tp->tg3_flags2 & TG3_FLG2_JUMBO_CAPABLE) { + } else if (tp->tg3_flags & TG3_FLAG_JUMBO_CAPABLE) { u32 phy_reg; /* Set bit 14 with read-modify-write to preserve other bits */ @@ -1933,7 +1933,7 @@ out: /* Set phy register 0x10 bit 0 to high fifo elasticity to support * jumbo frames transmission. */ - if (tp->tg3_flags2 & TG3_FLG2_JUMBO_CAPABLE) { + if (tp->tg3_flags & TG3_FLAG_JUMBO_CAPABLE) { u32 phy_reg; if (!tg3_readphy(tp, MII_TG3_EXT_CTRL, &phy_reg)) @@ -6975,7 +6975,7 @@ static int tg3_reset_hw(struct tg3 *tp, int reset_phy) /* Program the jumbo buffer descriptor ring control * blocks on those devices that have them. */ - if ((tp->tg3_flags2 & TG3_FLG2_JUMBO_CAPABLE) && + if ((tp->tg3_flags & TG3_FLAG_JUMBO_CAPABLE) && !(tp->tg3_flags2 & TG3_FLG2_5780_CLASS)) { /* Setup replenish threshold. */ tw32(RCVBDI_JUMBO_THRESH, tp->rx_jumbo_pending / 8); @@ -12034,7 +12034,7 @@ static int __devinit tg3_get_invariants(struct tg3 *tp) if (!(tp->tg3_flags2 & TG3_FLG2_5705_PLUS) || (tp->tg3_flags2 & TG3_FLG2_5780_CLASS)) - tp->tg3_flags2 |= TG3_FLG2_JUMBO_CAPABLE; + tp->tg3_flags |= TG3_FLAG_JUMBO_CAPABLE; pci_read_config_dword(tp->pdev, TG3PCI_PCISTATE, &pci_state_reg); |