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author | Stephen Hemminger <shemminger@linux-foundation.org> | 2007-06-04 17:23:22 -0700 |
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committer | Jeff Garzik <jeff@garzik.org> | 2007-07-08 22:16:42 -0400 |
commit | fc99fe0618f355b708ce88fedaca9783072ac3d5 (patch) | |
tree | 0a45bc3f04fdef6f80f89aa2791bf17a120fa9ad /drivers/net/sky2.c | |
parent | 3ead5db7bcd343917e567c083f5faf45f5301664 (diff) | |
download | lwn-fc99fe0618f355b708ce88fedaca9783072ac3d5.tar.gz lwn-fc99fe0618f355b708ce88fedaca9783072ac3d5.zip |
sky2: Add PCI device specfic register 4 & 5
Need to setup more PCI control control registers are on Yukon EX.
Some of these also exist on Yukon EC-U as well.
Signed-off-by: Stephen Hemminger <shemminger@linux-foundation.org>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
Diffstat (limited to 'drivers/net/sky2.c')
-rw-r--r-- | drivers/net/sky2.c | 18 |
1 files changed, 12 insertions, 6 deletions
diff --git a/drivers/net/sky2.c b/drivers/net/sky2.c index 612257172b95..0bd74fe5c338 100644 --- a/drivers/net/sky2.c +++ b/drivers/net/sky2.c @@ -217,13 +217,19 @@ static void sky2_power_on(struct sky2_hw *hw) sky2_write8(hw, B2_Y2_CLK_GATE, 0); if (hw->chip_id == CHIP_ID_YUKON_EC_U || hw->chip_id == CHIP_ID_YUKON_EX) { - u32 reg1; + u32 reg; - sky2_pci_write32(hw, PCI_DEV_REG3, 0); - reg1 = sky2_pci_read32(hw, PCI_DEV_REG4); - reg1 &= P_ASPM_CONTROL_MSK; - sky2_pci_write32(hw, PCI_DEV_REG4, reg1); - sky2_pci_write32(hw, PCI_DEV_REG5, 0); + reg = sky2_pci_read32(hw, PCI_DEV_REG4); + /* set all bits to 0 except bits 15..12 and 8 */ + reg &= P_ASPM_CONTROL_MSK; + sky2_pci_write32(hw, PCI_DEV_REG4, reg); + + reg = sky2_pci_read32(hw, PCI_DEV_REG5); + /* set all bits to 0 except bits 28 & 27 */ + reg &= P_CTL_TIM_VMAIN_AV_MSK; + sky2_pci_write32(hw, PCI_DEV_REG5, reg); + + sky2_pci_write32(hw, PCI_CFG_REG_1, 0); } } |