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| author | Florian Fainelli <f.fainelli@gmail.com> | 2018-05-22 17:04:49 -0700 |
|---|---|---|
| committer | David S. Miller <davem@davemloft.net> | 2018-05-23 15:27:01 -0400 |
| commit | 79fb218d97980d4fee9a64f4c8ff05289364ba25 (patch) | |
| tree | 35e718d42a661052d29a42647495b6333d37fe6a /drivers/net/phy/bcm-cygnus.c | |
| parent | 733a969a7ed14fc5786bcc59c1bdda83c7ddb46e (diff) | |
| download | lwn-79fb218d97980d4fee9a64f4c8ff05289364ba25.tar.gz lwn-79fb218d97980d4fee9a64f4c8ff05289364ba25.zip | |
net: phy: broadcom: Fix bcm_write_exp()
On newer PHYs, we need to select the expansion register to write with
setting bits [11:8] to 0xf. This was done correctly by bcm7xxx.c prior
to being migrated to generic code under bcm-phy-lib.c which
unfortunately used the older implementation from the BCM54xx days.
Fix this by creating an inline stub: bcm_write_exp_sel() which adds the
correct value (MII_BCM54XX_EXP_SEL_ER) and update both the Cygnus PHY
and BCM7xxx PHY drivers which require setting these bits.
broadcom.c is unchanged because some PHYs even use a different selector
method, so let them specify it directly (e.g: SerDes secondary selector).
Fixes: a1cba5613edf ("net: phy: Add Broadcom phy library for common interfaces")
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/phy/bcm-cygnus.c')
| -rw-r--r-- | drivers/net/phy/bcm-cygnus.c | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/drivers/net/phy/bcm-cygnus.c b/drivers/net/phy/bcm-cygnus.c index 6838129839ca..e757b09f1889 100644 --- a/drivers/net/phy/bcm-cygnus.c +++ b/drivers/net/phy/bcm-cygnus.c @@ -61,17 +61,17 @@ static int bcm_cygnus_afe_config(struct phy_device *phydev) return rc; /* make rcal=100, since rdb default is 000 */ - rc = bcm_phy_write_exp(phydev, MII_BRCM_CORE_EXPB1, 0x10); + rc = bcm_phy_write_exp_sel(phydev, MII_BRCM_CORE_EXPB1, 0x10); if (rc < 0) return rc; /* CORE_EXPB0, Reset R_CAL/RC_CAL Engine */ - rc = bcm_phy_write_exp(phydev, MII_BRCM_CORE_EXPB0, 0x10); + rc = bcm_phy_write_exp_sel(phydev, MII_BRCM_CORE_EXPB0, 0x10); if (rc < 0) return rc; /* CORE_EXPB0, Disable Reset R_CAL/RC_CAL Engine */ - rc = bcm_phy_write_exp(phydev, MII_BRCM_CORE_EXPB0, 0x00); + rc = bcm_phy_write_exp_sel(phydev, MII_BRCM_CORE_EXPB0, 0x00); return 0; } |