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authorSergey Shtylyov <s.shtylyov@omprussia.ru>2021-02-28 23:25:43 +0300
committerDavid S. Miller <davem@davemloft.net>2021-03-01 13:22:34 -0800
commit8c91bc3d44dfef8284af384877fbe61117e8b7d1 (patch)
tree33a6aa5aba384cacc202d996d0c09f38e91af254 /drivers/net/ethernet/renesas
parenta2bd45834e83d6c5a04d397bde13d744a4812dfc (diff)
downloadlwn-8c91bc3d44dfef8284af384877fbe61117e8b7d1.tar.gz
lwn-8c91bc3d44dfef8284af384877fbe61117e8b7d1.zip
sh_eth: fix TRSCER mask for SH771x
According to the SH7710, SH7712, SH7713 Group User's Manual: Hardware, Rev. 3.00, the TRSCER register actually has only bit 7 valid (and named differently), with all the other bits reserved. Apparently, this was not the case with some early revisions of the manual as we have the other bits declared (and set) in the original driver. Follow the suit and add the explicit sh_eth_cpu_data::trscer_err_mask initializer for SH771x... Fixes: 86a74ff21a7a ("net: sh_eth: add support for Renesas SuperH Ethernet") Signed-off-by: Sergey Shtylyov <s.shtylyov@omprussia.ru> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/ethernet/renesas')
-rw-r--r--drivers/net/ethernet/renesas/sh_eth.c3
1 files changed, 3 insertions, 0 deletions
diff --git a/drivers/net/ethernet/renesas/sh_eth.c b/drivers/net/ethernet/renesas/sh_eth.c
index 590b088bc4c7..e79bb0a3ced5 100644
--- a/drivers/net/ethernet/renesas/sh_eth.c
+++ b/drivers/net/ethernet/renesas/sh_eth.c
@@ -1089,6 +1089,9 @@ static struct sh_eth_cpu_data sh771x_data = {
EESIPR_CEEFIP | EESIPR_CELFIP |
EESIPR_RRFIP | EESIPR_RTLFIP | EESIPR_RTSFIP |
EESIPR_PREIP | EESIPR_CERFIP,
+
+ .trscer_err_mask = DESC_I_RINT8,
+
.tsu = 1,
.dual_port = 1,
};