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authorDanielle Ratson <danieller@nvidia.com>2022-07-24 11:03:23 +0300
committerDavid S. Miller <davem@davemloft.net>2022-07-25 13:58:55 +0100
commit33a9583f9a02d2d8d820f41eb1ed83e06a016bba (patch)
treeefbce88b86090f76686ba1285cd6675789af4261 /drivers/net/ethernet/mellanox/mlxsw/spectrum.c
parent448e9cb3631ea57e4c41ea688f1689af2ed7fd60 (diff)
downloadlwn-33a9583f9a02d2d8d820f41eb1ed83e06a016bba.tar.gz
lwn-33a9583f9a02d2d8d820f41eb1ed83e06a016bba.zip
mlxsw: Rename 'read_frc_capable' bit to 'read_clock_capable'
Rename the 'read_frc_capable' bit to 'read_clock_capable' since now it can be both the FRC and UTC clocks. Signed-off-by: Danielle Ratson <danieller@nvidia.com> Reviewed-by: Petr Machata <petrm@nvidia.com> Signed-off-by: Amit Cohen <amcohen@nvidia.com> Signed-off-by: Ido Schimmel <idosch@nvidia.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/ethernet/mellanox/mlxsw/spectrum.c')
-rw-r--r--drivers/net/ethernet/mellanox/mlxsw/spectrum.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/net/ethernet/mellanox/mlxsw/spectrum.c b/drivers/net/ethernet/mellanox/mlxsw/spectrum.c
index bd7552e8dd5c..641078060b02 100644
--- a/drivers/net/ethernet/mellanox/mlxsw/spectrum.c
+++ b/drivers/net/ethernet/mellanox/mlxsw/spectrum.c
@@ -3096,7 +3096,7 @@ static int mlxsw_sp_init(struct mlxsw_core *mlxsw_core,
goto err_router_init;
}
- if (mlxsw_sp->bus_info->read_frc_capable) {
+ if (mlxsw_sp->bus_info->read_clock_capable) {
/* NULL is a valid return value from clock_init */
mlxsw_sp->clock =
mlxsw_sp->ptp_ops->clock_init(mlxsw_sp,