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authorAlexander Duyck <alexander.h.duyck@intel.com>2012-07-27 23:49:30 +0000
committerJeff Kirsher <jeffrey.t.kirsher@intel.com>2012-10-19 03:52:02 -0700
commit245f292d71d3fdd7536c2e4986769d5b9b48fb7f (patch)
tree928a51d2b8a0d7732b810fe19cb90015087379ee /drivers/net/ethernet/intel/ixgbe/ixgbe_sriov.c
parentdb0fe0b2f6bba2fda939737d063db2ae14c58d71 (diff)
downloadlwn-245f292d71d3fdd7536c2e4986769d5b9b48fb7f.tar.gz
lwn-245f292d71d3fdd7536c2e4986769d5b9b48fb7f.zip
ixgbe: Initialize q_vector cpu and affinity masks correctly
When enabling DCB the rings belonging to a q_vector on CPU 0 were not reinitializing their DCA registers. Upon closer inspection the issue was that the q_vector CPU variable was left at 0 resulting in the driver not updating the DCA registers. In order to guarantee the DCA registers will be updated I am adding a couple line change so that we initialize the CPU variable to -1 which will force a DCA update the first time an interrupt fires on that q_vector. In addition we were setting the CPU affinity hint to all CPUs when we were not specifying a CPU. Instead we should leave it as all zeros to avoid any possible confusion about the fact that we shouldn't be giving a hint. Signed-off-by: Alexander Duyck <alexander.h.duyck@intel.com> Tested-by: Phil Schmitt <phillip.j.schmitt@intel.com> Tested-by: Ross Brattain <ross.b.brattain@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
Diffstat (limited to 'drivers/net/ethernet/intel/ixgbe/ixgbe_sriov.c')
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