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| author | Jamie Iles <jamie@jamieiles.com> | 2011-03-09 16:29:59 +0000 |
|---|---|---|
| committer | Jamie Iles <jamie@jamieiles.com> | 2011-11-22 15:21:19 +0000 |
| commit | 757a03c6e004fbbdef872cb7ecdc940a891b8e6e (patch) | |
| tree | 4de9a10fee4f2cba1ac922291f1a0780f9f021e4 /drivers/net/ethernet/cadence/macb.c | |
| parent | a494ed8e25759f05f5a419d675f198e4359ef6fc (diff) | |
| download | lwn-757a03c6e004fbbdef872cb7ecdc940a891b8e6e.tar.gz lwn-757a03c6e004fbbdef872cb7ecdc940a891b8e6e.zip | |
macb: support DMA bus widths > 32 bits
Some GEM implementations may support DMA bus widths up to 128 bits. We
can get the maximum supported DMA bus width from the design
configuration register so use that to program the device up.
Signed-off-by: Jamie Iles <jamie@jamieiles.com>
Acked-by: David S. Miller <davem@davemloft.net>
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Tested-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Diffstat (limited to 'drivers/net/ethernet/cadence/macb.c')
| -rw-r--r-- | drivers/net/ethernet/cadence/macb.c | 23 |
1 files changed, 23 insertions, 0 deletions
diff --git a/drivers/net/ethernet/cadence/macb.c b/drivers/net/ethernet/cadence/macb.c index 6a7d3eae8cc7..38f1932013d1 100644 --- a/drivers/net/ethernet/cadence/macb.c +++ b/drivers/net/ethernet/cadence/macb.c @@ -835,6 +835,27 @@ static u32 macb_mdc_clk_div(struct macb *bp) return config; } +/* + * Get the DMA bus width field of the network configuration register that we + * should program. We find the width from decoding the design configuration + * register to find the maximum supported data bus width. + */ +static u32 macb_dbw(struct macb *bp) +{ + if (!macb_is_gem(bp)) + return 0; + + switch (GEM_BFEXT(DBWDEF, gem_readl(bp, DCFG1))) { + case 4: + return GEM_BF(DBW, GEM_DBW128); + case 2: + return GEM_BF(DBW, GEM_DBW64); + case 1: + default: + return GEM_BF(DBW, GEM_DBW32); + } +} + static void macb_init_hw(struct macb *bp) { u32 config; @@ -850,6 +871,7 @@ static void macb_init_hw(struct macb *bp) config |= MACB_BIT(CAF); /* Copy All Frames */ if (!(bp->dev->flags & IFF_BROADCAST)) config |= MACB_BIT(NBC); /* No BroadCast */ + config |= macb_dbw(bp); macb_writel(bp, NCFGR, config); /* Initialize TX and RX buffers */ @@ -1276,6 +1298,7 @@ static int __init macb_probe(struct platform_device *pdev) /* Set MII management clock divider */ config = macb_mdc_clk_div(bp); + config |= macb_dbw(bp); macb_writel(bp, NCFGR, config); macb_get_hwaddr(bp); |