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authorLendacky, Thomas <Thomas.Lendacky@amd.com>2014-06-24 16:19:29 -0500
committerDavid S. Miller <davem@davemloft.net>2014-06-26 17:14:04 -0700
commitb85e4d8960f10e4b28613a3e7b76f8889a2089e3 (patch)
tree240e74511042f9bdd930dcb41c030f0eb910c4b1 /drivers/net/ethernet/amd/xgbe/xgbe.h
parent801c62d945c6121c0262924732e430f0553bfb37 (diff)
downloadlwn-b85e4d8960f10e4b28613a3e7b76f8889a2089e3.tar.gz
lwn-b85e4d8960f10e4b28613a3e7b76f8889a2089e3.zip
amd-xgbe: Change destination address filtering support
Currently the driver makes use of the additional mac address registers in the hardware to provide perfect filtering. The hardware can also have a set of hash table registers that can be used for imperfect filtering. By using imperfect filtering the additional mac address registers can be used for layer 2 filtering support. Use the hash table registers if the device has them. Signed-off-by: Tom Lendacky <thomas.lendacky@amd.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/ethernet/amd/xgbe/xgbe.h')
-rw-r--r--drivers/net/ethernet/amd/xgbe/xgbe.h4
1 files changed, 3 insertions, 1 deletions
diff --git a/drivers/net/ethernet/amd/xgbe/xgbe.h b/drivers/net/ethernet/amd/xgbe/xgbe.h
index 3cb911f39b60..a2d5f5f5d8b7 100644
--- a/drivers/net/ethernet/amd/xgbe/xgbe.h
+++ b/drivers/net/ethernet/amd/xgbe/xgbe.h
@@ -191,6 +191,8 @@
/* Flow control queue count */
#define XGMAC_MAX_FLOW_CONTROL_QUEUES 8
+/* Maximum MAC address hash table size (256 bits = 8 bytes) */
+#define XGBE_MAC_HASH_TABLE_SIZE 8
struct xgbe_prv_data;
@@ -387,7 +389,7 @@ struct xgbe_hw_if {
int (*set_promiscuous_mode)(struct xgbe_prv_data *, unsigned int);
int (*set_all_multicast_mode)(struct xgbe_prv_data *, unsigned int);
- int (*set_addn_mac_addrs)(struct xgbe_prv_data *, unsigned int);
+ int (*add_mac_addresses)(struct xgbe_prv_data *);
int (*set_mac_address)(struct xgbe_prv_data *, u8 *addr);
int (*enable_rx_csum)(struct xgbe_prv_data *);