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authorMiquel Raynal <miquel.raynal@bootlin.com>2023-12-15 13:32:07 +0100
committerMiquel Raynal <miquel.raynal@bootlin.com>2023-12-22 12:39:24 +0100
commita62c4597953fe54c6af04166a5e2872efd0e1490 (patch)
tree41db956392676d4247f4c4098219655a6c02975d /drivers/mtd
parent7c9414c870c027737d0f2ed7b0ed10f26edb1c61 (diff)
downloadlwn-a62c4597953fe54c6af04166a5e2872efd0e1490.tar.gz
lwn-a62c4597953fe54c6af04166a5e2872efd0e1490.zip
mtd: rawnand: Prevent sequential reads with on-die ECC engines
Some devices support sequential reads when using the on-die ECC engines, some others do not. It is a bit hard to know which ones will break other than experimentally, so in order to avoid such a difficult and painful task, let's just pretend all devices should avoid using this optimization when configured like this. Cc: stable@vger.kernel.org Fixes: 003fe4b9545b ("mtd: rawnand: Support for sequential cache reads") Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Tested-by: Martin Hundebøll <martin@geanix.com> Link: https://lore.kernel.org/linux-mtd/20231215123208.516590-4-miquel.raynal@bootlin.com
Diffstat (limited to 'drivers/mtd')
-rw-r--r--drivers/mtd/nand/raw/nand_base.c8
1 files changed, 8 insertions, 0 deletions
diff --git a/drivers/mtd/nand/raw/nand_base.c b/drivers/mtd/nand/raw/nand_base.c
index 1b0a984d181d..139fdf3e58c0 100644
--- a/drivers/mtd/nand/raw/nand_base.c
+++ b/drivers/mtd/nand/raw/nand_base.c
@@ -5170,6 +5170,14 @@ static void rawnand_late_check_supported_ops(struct nand_chip *chip)
/* The supported_op fields should not be set by individual drivers */
WARN_ON_ONCE(chip->controller->supported_op.cont_read);
+ /*
+ * Too many devices do not support sequential cached reads with on-die
+ * ECC correction enabled, so in this case refuse to perform the
+ * automation.
+ */
+ if (chip->ecc.engine_type == NAND_ECC_ENGINE_TYPE_ON_DIE)
+ return;
+
if (!nand_has_exec_op(chip))
return;