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authorBoris Brezillon <boris.brezillon@bootlin.com>2018-09-07 00:38:34 +0200
committerMiquel Raynal <miquel.raynal@bootlin.com>2018-10-03 11:12:25 +0200
commit82fc5099744e5f30cd8c9ee13075f28fb37e9518 (patch)
tree19fa15428ac6dbb8bc79bac579c9914b1e2010cb /drivers/mtd/nand/raw/fsl_upm.c
parent4ae94025171608e0661372cf846e17d062cb9620 (diff)
downloadlwn-82fc5099744e5f30cd8c9ee13075f28fb37e9518.tar.gz
lwn-82fc5099744e5f30cd8c9ee13075f28fb37e9518.zip
mtd: rawnand: Create a legacy struct and move ->IO_ADDR_{R, W} there
We regularly have new NAND controller drivers that are making use of fields/hooks that we want to get rid of but can't because of all the legacy drivers that we might break if we do. So, instead of removing those fields/hooks, let's move them to a sub-struct which is clearly documented as deprecated. We start with the ->IO_ADDR_{R,W] fields. Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Diffstat (limited to 'drivers/mtd/nand/raw/fsl_upm.c')
-rw-r--r--drivers/mtd/nand/raw/fsl_upm.c16
1 files changed, 8 insertions, 8 deletions
diff --git a/drivers/mtd/nand/raw/fsl_upm.c b/drivers/mtd/nand/raw/fsl_upm.c
index 48c5215f9a0e..f59fd57fc529 100644
--- a/drivers/mtd/nand/raw/fsl_upm.c
+++ b/drivers/mtd/nand/raw/fsl_upm.c
@@ -101,7 +101,7 @@ static void fun_cmd_ctrl(struct nand_chip *chip, int cmd, unsigned int ctrl)
mar = (cmd << (32 - fun->upm.width)) |
fun->mchip_offsets[fun->mchip_number];
- fsl_upm_run_pattern(&fun->upm, chip->IO_ADDR_R, mar);
+ fsl_upm_run_pattern(&fun->upm, chip->legacy.IO_ADDR_R, mar);
if (fun->wait_flags & FSL_UPM_WAIT_RUN_PATTERN)
fun_wait_rnb(fun);
@@ -115,8 +115,8 @@ static void fun_select_chip(struct nand_chip *chip, int mchip_nr)
chip->cmd_ctrl(chip, NAND_CMD_NONE, 0 | NAND_CTRL_CHANGE);
} else if (mchip_nr >= 0 && mchip_nr < NAND_MAX_CHIPS) {
fun->mchip_number = mchip_nr;
- chip->IO_ADDR_R = fun->io_base + fun->mchip_offsets[mchip_nr];
- chip->IO_ADDR_W = chip->IO_ADDR_R;
+ chip->legacy.IO_ADDR_R = fun->io_base + fun->mchip_offsets[mchip_nr];
+ chip->legacy.IO_ADDR_W = chip->legacy.IO_ADDR_R;
} else {
BUG();
}
@@ -126,7 +126,7 @@ static uint8_t fun_read_byte(struct nand_chip *chip)
{
struct fsl_upm_nand *fun = to_fsl_upm_nand(nand_to_mtd(chip));
- return in_8(fun->chip.IO_ADDR_R);
+ return in_8(fun->chip.legacy.IO_ADDR_R);
}
static void fun_read_buf(struct nand_chip *chip, uint8_t *buf, int len)
@@ -135,7 +135,7 @@ static void fun_read_buf(struct nand_chip *chip, uint8_t *buf, int len)
int i;
for (i = 0; i < len; i++)
- buf[i] = in_8(fun->chip.IO_ADDR_R);
+ buf[i] = in_8(fun->chip.legacy.IO_ADDR_R);
}
static void fun_write_buf(struct nand_chip *chip, const uint8_t *buf, int len)
@@ -144,7 +144,7 @@ static void fun_write_buf(struct nand_chip *chip, const uint8_t *buf, int len)
int i;
for (i = 0; i < len; i++) {
- out_8(fun->chip.IO_ADDR_W, buf[i]);
+ out_8(fun->chip.legacy.IO_ADDR_W, buf[i]);
if (fun->wait_flags & FSL_UPM_WAIT_WRITE_BYTE)
fun_wait_rnb(fun);
}
@@ -160,8 +160,8 @@ static int fun_chip_init(struct fsl_upm_nand *fun,
int ret;
struct device_node *flash_np;
- fun->chip.IO_ADDR_R = fun->io_base;
- fun->chip.IO_ADDR_W = fun->io_base;
+ fun->chip.legacy.IO_ADDR_R = fun->io_base;
+ fun->chip.legacy.IO_ADDR_W = fun->io_base;
fun->chip.cmd_ctrl = fun_cmd_ctrl;
fun->chip.chip_delay = fun->chip_delay;
fun->chip.read_byte = fun_read_byte;