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author | Ezequiel Garcia <ezequiel.garcia@free-electrons.com> | 2013-08-12 14:14:49 -0300 |
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committer | David Woodhouse <David.Woodhouse@intel.com> | 2013-08-30 21:34:52 +0100 |
commit | 5bb653e890ca7a5b4ba9042cb60d02f7ddef8c21 (patch) | |
tree | e6188756ec5c1856ce848beba9ca02f7a63a8c59 /drivers/mtd/nand/pxa3xx_nand.c | |
parent | cd9d11820f4232856d6254a29fbb9c4f51a981c2 (diff) | |
download | lwn-5bb653e890ca7a5b4ba9042cb60d02f7ddef8c21.tar.gz lwn-5bb653e890ca7a5b4ba9042cb60d02f7ddef8c21.zip |
mtd: nand: pxa3xx: Allow to set/clear the 'spare enable' field
Some commands (such as the ONFI parameter page read) need to
clear the 'spare enable' bit. This commit allows to set/clear
depending on the prepared command, instead of having it always
set.
Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Tested-by: Daniel Mack <zonque@gmail.com>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
Diffstat (limited to 'drivers/mtd/nand/pxa3xx_nand.c')
-rw-r--r-- | drivers/mtd/nand/pxa3xx_nand.c | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/drivers/mtd/nand/pxa3xx_nand.c b/drivers/mtd/nand/pxa3xx_nand.c index 1dcda6badfdc..6e28121d3118 100644 --- a/drivers/mtd/nand/pxa3xx_nand.c +++ b/drivers/mtd/nand/pxa3xx_nand.c @@ -185,6 +185,7 @@ struct pxa3xx_nand_info { int cs; int use_ecc; /* use HW ECC ? */ int use_dma; /* use DMA ? */ + int use_spare; /* use spare ? */ int is_ready; unsigned int page_size; /* page size of attached chip */ @@ -325,6 +326,11 @@ static void pxa3xx_nand_start(struct pxa3xx_nand_info *info) else ndcr &= ~NDCR_DMA_EN; + if (info->use_spare) + ndcr |= NDCR_SPARE_EN; + else + ndcr &= ~NDCR_SPARE_EN; + ndcr |= NDCR_ND_RUN; /* clear status bits and run */ @@ -526,6 +532,7 @@ static int prepare_command_pool(struct pxa3xx_nand_info *info, int command, info->buf_count = 0; info->oob_size = 0; info->use_ecc = 0; + info->use_spare = 1; info->use_dma = (use_dma) ? 1 : 0; info->is_ready = 0; info->retcode = ERR_NONE; |