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authorMasahiro Yamada <yamada.masahiro@socionext.com>2017-03-23 05:07:07 +0900
committerBoris Brezillon <boris.brezillon@free-electrons.com>2017-03-24 09:51:38 +0100
commitbe72a4aa8ec1c13a55708bd0285106a5020ff72f (patch)
tree0c56f3f0285834e90dcae6c2e86fb7b6a5464b5c /drivers/mtd/nand/denali.h
parent1aded58a27f253f399dcd5746417e684c92ccd7d (diff)
downloadlwn-be72a4aa8ec1c13a55708bd0285106a5020ff72f.tar.gz
lwn-be72a4aa8ec1c13a55708bd0285106a5020ff72f.zip
mtd: nand: denali: introduce capability flag
The Denali NAND controller IP has various customizable features. SoC vendors can choose desired functions when a delivery RTL is created. It means there are several variants for this IP. For example, the Intel version is equipped with 32bit DMA, whereas the IP for UniPhier SoC family with 64bit DMA. This driver was originally written for some Intel platforms with Intel specific things hard-coded. What is worse, the revision register of this IP does not work to distinguish such features. We need to do something to make the driver available for other SoCs. Let's introduce a caps member to the denali_nand_info structure to switch on/off various features. Also, add struct denali_dt_data to store the capability associated with compatible string. Boris suggested this approach in discussion [1] instead of a new DT property for every feature. [1] https://lkml.org/lkml/2016/3/29/142 Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Diffstat (limited to 'drivers/mtd/nand/denali.h')
-rw-r--r--drivers/mtd/nand/denali.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/mtd/nand/denali.h b/drivers/mtd/nand/denali.h
index 8df2285b678b..eed001dde3b4 100644
--- a/drivers/mtd/nand/denali.h
+++ b/drivers/mtd/nand/denali.h
@@ -338,6 +338,7 @@ struct denali_nand_info {
uint32_t devnum; /* represent how many nands connected */
uint32_t bbtskipbytes;
uint32_t max_banks;
+ unsigned int caps;
};
extern int denali_init(struct denali_nand_info *denali);