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| author | Thomas Gleixner <tglx@linutronix.de> | 2005-11-07 11:15:40 +0000 |
|---|---|---|
| committer | Thomas Gleixner <tglx@mtd.linutronix.de> | 2005-11-07 15:01:58 +0100 |
| commit | 69f34c98c1416eb74c55e38a21dbf3e294966514 (patch) | |
| tree | 956f39f06463b026f293347b47de812fc3b6545f /drivers/mtd/maps/alchemy-flash.c | |
| parent | 1f948b43f7b5cf721cf0d03f507843efc1a9bfad (diff) | |
| download | lwn-69f34c98c1416eb74c55e38a21dbf3e294966514.tar.gz lwn-69f34c98c1416eb74c55e38a21dbf3e294966514.zip | |
[MTD] maps: Clean up trailing white spaces
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Diffstat (limited to 'drivers/mtd/maps/alchemy-flash.c')
| -rw-r--r-- | drivers/mtd/maps/alchemy-flash.c | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/drivers/mtd/maps/alchemy-flash.c b/drivers/mtd/maps/alchemy-flash.c index 27fd2a3c3b60..a57791a6ce40 100644 --- a/drivers/mtd/maps/alchemy-flash.c +++ b/drivers/mtd/maps/alchemy-flash.c @@ -1,10 +1,10 @@ /* * Flash memory access on AMD Alchemy evaluation boards - * - * $Id: alchemy-flash.c,v 1.1 2005/02/27 21:50:21 ppopov Exp $ + * + * $Id: alchemy-flash.c,v 1.2 2005/11/07 11:14:26 gleixner Exp $ * * (C) 2003, 2004 Pete Popov <ppopov@embeddedalley.com> - * + * */ #include <linux/config.h> @@ -22,7 +22,7 @@ #ifdef DEBUG_RW #define DBG(x...) printk(x) #else -#define DBG(x...) +#define DBG(x...) #endif #ifdef CONFIG_MIPS_PB1000 @@ -136,7 +136,7 @@ int __init alchemy_mtd_init(void) int nb_parts = 0; unsigned long window_addr; unsigned long window_size; - + /* Default flash buswidth */ alchemy_map.bankwidth = BOARD_FLASH_WIDTH; @@ -161,7 +161,7 @@ int __init alchemy_mtd_init(void) * Now let's probe for the actual flash. Do it here since * specific machine settings might have been set above. */ - printk(KERN_NOTICE BOARD_MAP_NAME ": probing %d-bit flash bus\n", + printk(KERN_NOTICE BOARD_MAP_NAME ": probing %d-bit flash bus\n", alchemy_map.bankwidth*8); alchemy_map.virt = ioremap(window_addr, window_size); mymtd = do_map_probe("cfi_probe", &alchemy_map); |