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| author | Adrian Hunter <adrian.hunter@intel.com> | 2014-09-24 10:27:33 +0300 |
|---|---|---|
| committer | Jiri Slaby <jslaby@suse.cz> | 2015-02-08 19:26:39 +0100 |
| commit | e29366fda793d8d423e0a476b62c2a3a703d4dc6 (patch) | |
| tree | 3f0012aabe1cf304452bb0d2457c7332ab217248 /drivers/mmc | |
| parent | a17e1c8da5772d176e6c2dcb209f4164cd7dc4b6 (diff) | |
| download | lwn-e29366fda793d8d423e0a476b62c2a3a703d4dc6.tar.gz lwn-e29366fda793d8d423e0a476b62c2a3a703d4dc6.zip | |
mmc: sdhci-pci: Fix Braswell eMMC timeout clock frequency
commit a06586b62db5c63752e2e68daffec4baa275d594 upstream.
Braswell eMMC host controller specifies an incorrect
timeout clock frequncy in the capabilities registers.
The correct value is 1 MHz.
Signed-off-by: Adrian Hunter <adrian.hunter@intel.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Jiri Slaby <jslaby@suse.cz>
Diffstat (limited to 'drivers/mmc')
| -rw-r--r-- | drivers/mmc/host/sdhci-pci.c | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/mmc/host/sdhci-pci.c b/drivers/mmc/host/sdhci-pci.c index a130a11d89de..730527af71d7 100644 --- a/drivers/mmc/host/sdhci-pci.c +++ b/drivers/mmc/host/sdhci-pci.c @@ -270,6 +270,8 @@ static int byt_emmc_probe_slot(struct sdhci_pci_slot *slot) MMC_CAP_HW_RESET; slot->host->mmc->caps2 |= MMC_CAP2_HC_ERASE_SZ; slot->hw_reset = sdhci_pci_int_hw_reset; + if (slot->chip->pdev->device == PCI_DEVICE_ID_INTEL_BSW_EMMC) + slot->host->timeout_clk = 1000; /* 1000 kHz i.e. 1 MHz */ return 0; } |