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authorShawn Lin <shawn.lin@rock-chips.com>2026-03-09 11:29:02 +0800
committerUlf Hansson <ulf.hansson@linaro.org>2026-03-16 15:43:42 +0100
commit8750929d971386c530ca1e131e50a56187fa5f73 (patch)
tree702a3779e8c4c882dbd256199c02a7fafe1b13a8 /drivers/mmc
parent0d944576c99ebaacadb07ceb7e34bfbcc67a32d6 (diff)
downloadlwn-8750929d971386c530ca1e131e50a56187fa5f73.tar.gz
lwn-8750929d971386c530ca1e131e50a56187fa5f73.zip
mmc: dw_mmc-hi3798mv200: Using phase map from dw_mmc core
dw_mmc core helps parse phase map now, so reuse it. No functional changes intended. Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Diffstat (limited to 'drivers/mmc')
-rw-r--r--drivers/mmc/host/dw_mmc-hi3798mv200.c11
1 files changed, 4 insertions, 7 deletions
diff --git a/drivers/mmc/host/dw_mmc-hi3798mv200.c b/drivers/mmc/host/dw_mmc-hi3798mv200.c
index a64907e2e84c..fda417888be9 100644
--- a/drivers/mmc/host/dw_mmc-hi3798mv200.c
+++ b/drivers/mmc/host/dw_mmc-hi3798mv200.c
@@ -30,13 +30,12 @@ struct dw_mci_hi3798mv200_priv {
struct clk *drive_clk;
struct regmap *crg_reg;
u32 sap_dll_offset;
- struct mmc_clk_phase_map phase_map;
};
static void dw_mci_hi3798mv200_set_ios(struct dw_mci *host, struct mmc_ios *ios)
{
struct dw_mci_hi3798mv200_priv *priv = host->priv;
- struct mmc_clk_phase phase = priv->phase_map.phase[ios->timing];
+ struct mmc_clk_phase phase = host->phase_map.phase[ios->timing];
u32 val;
val = mci_readl(host, ENABLE_SHIFT);
@@ -158,9 +157,9 @@ tuning_out:
* We don't care what timing we are tuning for,
* simply use the same phase for all timing needs tuning.
*/
- priv->phase_map.phase[MMC_TIMING_MMC_HS200].in_deg = degrees[mid];
- priv->phase_map.phase[MMC_TIMING_MMC_HS400].in_deg = degrees[mid];
- priv->phase_map.phase[MMC_TIMING_UHS_SDR104].in_deg = degrees[mid];
+ host->phase_map.phase[MMC_TIMING_MMC_HS200].in_deg = degrees[mid];
+ host->phase_map.phase[MMC_TIMING_MMC_HS400].in_deg = degrees[mid];
+ host->phase_map.phase[MMC_TIMING_UHS_SDR104].in_deg = degrees[mid];
clk_set_phase(priv->sample_clk, degrees[mid]);
dev_dbg(host->dev, "Tuning clk_sample[%d, %d], set[%d]\n",
@@ -185,8 +184,6 @@ static int dw_mci_hi3798mv200_init(struct dw_mci *host)
if (!priv)
return -ENOMEM;
- mmc_of_parse_clk_phase(host->dev, &priv->phase_map);
-
priv->sample_clk = devm_clk_get_enabled(host->dev, "ciu-sample");
if (IS_ERR(priv->sample_clk))
return dev_err_probe(host->dev, PTR_ERR(priv->sample_clk),