diff options
| author | Kishon Vijay Abraham I <kishon@ti.com> | 2017-08-21 13:11:29 +0530 |
|---|---|---|
| committer | Ulf Hansson <ulf.hansson@linaro.org> | 2017-08-30 15:03:43 +0200 |
| commit | 1284c248d145926760eab7244252f695f7a7a46a (patch) | |
| tree | 09d82807025be0485a457358146861a2daf8163f /drivers/mmc/host/sdhci.h | |
| parent | 4a5fc11945af753f3e565db61f80976bb1fcddc7 (diff) | |
| download | lwn-1284c248d145926760eab7244252f695f7a7a46a.tar.gz lwn-1284c248d145926760eab7244252f695f7a7a46a.zip | |
mmc: sdhci: Add quirk to indicate MMC_RSP_136 has CRC
TI's implementation of sdhci controller used in DRA7 SoC's has
CRC in responses with length 136 bits. Add quirk to indicate
the controller has CRC in MMC_RSP_136. If this quirk is
set sdhci library shouldn't shift the response present in
SDHCI_RESPONSE register.
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Acked-by: Adrian Hunter <adrian.hunter@intel.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Diffstat (limited to 'drivers/mmc/host/sdhci.h')
| -rw-r--r-- | drivers/mmc/host/sdhci.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/mmc/host/sdhci.h b/drivers/mmc/host/sdhci.h index 399edc681623..54bc444c317f 100644 --- a/drivers/mmc/host/sdhci.h +++ b/drivers/mmc/host/sdhci.h @@ -435,6 +435,8 @@ struct sdhci_host { #define SDHCI_QUIRK2_ACMD23_BROKEN (1<<14) /* Broken Clock divider zero in controller */ #define SDHCI_QUIRK2_CLOCK_DIV_ZERO_BROKEN (1<<15) +/* Controller has CRC in 136 bit Command Response */ +#define SDHCI_QUIRK2_RSP_136_HAS_CRC (1<<16) int irq; /* Device IRQ */ void __iomem *ioaddr; /* Mapped address */ |