diff options
| author | Ofir Bitton <obitton@habana.ai> | 2020-10-05 11:36:00 +0300 |
|---|---|---|
| committer | Oded Gabbay <ogabbay@kernel.org> | 2020-11-30 10:47:31 +0200 |
| commit | 1cbca899fa57637036aa3199bd3f2208db2efff5 (patch) | |
| tree | 0d458cf1bbeb424e618004f9c0b47ab5c360f524 /drivers/misc/habanalabs/common/firmware_if.c | |
| parent | ccf979ee330b195961116f74cd75ba677fdc4cd7 (diff) | |
| download | lwn-1cbca899fa57637036aa3199bd3f2208db2efff5.tar.gz lwn-1cbca899fa57637036aa3199bd3f2208db2efff5.zip | |
habanalabs/gaudi: fetch PLL info from FW
Once FW security is enabled there is no access to PLL registers,
need to read values from FW using a dedicated interface.
Signed-off-by: Ofir Bitton <obitton@habana.ai>
Reviewed-by: Oded Gabbay <ogabbay@kernel.org>
Signed-off-by: Oded Gabbay <ogabbay@kernel.org>
Diffstat (limited to 'drivers/misc/habanalabs/common/firmware_if.c')
| -rw-r--r-- | drivers/misc/habanalabs/common/firmware_if.c | 26 |
1 files changed, 26 insertions, 0 deletions
diff --git a/drivers/misc/habanalabs/common/firmware_if.c b/drivers/misc/habanalabs/common/firmware_if.c index 8de6a8690b1b..d84a70ec0ce1 100644 --- a/drivers/misc/habanalabs/common/firmware_if.c +++ b/drivers/misc/habanalabs/common/firmware_if.c @@ -448,6 +448,32 @@ int hl_fw_cpucp_total_energy_get(struct hl_device *hdev, u64 *total_energy) return rc; } +int hl_fw_cpucp_pll_info_get(struct hl_device *hdev, + enum cpucp_pll_type_attributes pll_type, + enum cpucp_pll_reg_attributes pll_reg, + u32 *pll_info) +{ + struct cpucp_packet pkt; + long result; + int rc; + + memset(&pkt, 0, sizeof(pkt)); + + pkt.ctl = cpu_to_le32(CPUCP_PACKET_PLL_REG_GET << + CPUCP_PKT_CTL_OPCODE_SHIFT); + pkt.pll_type = __cpu_to_le16(pll_type); + pkt.pll_reg = __cpu_to_le16(pll_reg); + + rc = hdev->asic_funcs->send_cpu_message(hdev, (u32 *) &pkt, sizeof(pkt), + HL_CPUCP_INFO_TIMEOUT_USEC, &result); + if (rc) + dev_err(hdev->dev, "Failed to read PLL info, error %d\n", rc); + + *pll_info = result; + + return rc; +} + static void fw_read_errors(struct hl_device *hdev, u32 boot_err0_reg, u32 cpu_security_boot_status_reg) { |