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author | Andrew Lunn <andrew@lunn.ch> | 2014-02-07 00:41:58 +0100 |
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committer | Jason Cooper <jason@lakedaemon.net> | 2014-02-21 21:46:56 +0000 |
commit | d86e9af6336c0ad586a5dbd70064253d40bbb5ff (patch) | |
tree | d5095ca2b1de20a3505320cfde37f5bc637e57c8 /drivers/irqchip | |
parent | e0318ec3bf3f1502cd11b21b1eb00aa355b40b67 (diff) | |
download | lwn-d86e9af6336c0ad586a5dbd70064253d40bbb5ff.tar.gz lwn-d86e9af6336c0ad586a5dbd70064253d40bbb5ff.zip |
irqchip: orion: Fix getting generic chip pointer.
Enabling SPARSE_IRQ shows up a bug in the irq-orion bridge interrupt
handler. The bridge interrupt is implemented using a single generic
chip. Thus the parameter passed to irq_get_domain_generic_chip()
should always be zero.
Signed-off-by: Andrew Lunn <andrew@lunn.ch>
Acked-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Fixes: 9dbd90f17e4f ("irqchip: Add support for Marvell Orion SoCs")
Cc: <stable@vger.kernel.org> # v3.11+
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
Diffstat (limited to 'drivers/irqchip')
-rw-r--r-- | drivers/irqchip/irq-orion.c | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/drivers/irqchip/irq-orion.c b/drivers/irqchip/irq-orion.c index 0dfdc5c824a1..8e41be62812e 100644 --- a/drivers/irqchip/irq-orion.c +++ b/drivers/irqchip/irq-orion.c @@ -111,7 +111,8 @@ IRQCHIP_DECLARE(orion_intc, "marvell,orion-intc", orion_irq_init); static void orion_bridge_irq_handler(unsigned int irq, struct irq_desc *desc) { struct irq_domain *d = irq_get_handler_data(irq); - struct irq_chip_generic *gc = irq_get_domain_generic_chip(d, irq); + + struct irq_chip_generic *gc = irq_get_domain_generic_chip(d, 0); u32 stat = readl_relaxed(gc->reg_base + ORION_BRIDGE_IRQ_CAUSE) & gc->mask_cache; |