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author | Jisheng Zhang <jszhang@marvell.com> | 2014-11-12 14:22:53 +0800 |
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committer | Jason Cooper <jason@lakedaemon.net> | 2014-11-26 16:07:54 +0000 |
commit | a9d5fcc00e715354d3fec1e8009c5895b5ba65ba (patch) | |
tree | 774242702aa8c77c309e4d07ed95ab3dab1abef2 /drivers/irqchip | |
parent | 8876ce7d1cbaca495bd6dee96d371f98e9cfb1eb (diff) | |
download | lwn-a9d5fcc00e715354d3fec1e8009c5895b5ba65ba.tar.gz lwn-a9d5fcc00e715354d3fec1e8009c5895b5ba65ba.zip |
irqchip: dw-apb-ictl: Enable IRQ_GC_MASK_CACHE_PER_TYPE
The irq_chip_type instances have separate mask registers, so we need to
enable IRQ_GC_MASK_CACHE_PER_TYPE to actually handle separate mask registers.
Signed-off-by: Jisheng Zhang <jszhang@marvell.com>
Acked-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Link: https://lkml.kernel.org/r/1415773374-4629-3-git-send-email-jszhang@marvell.com
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
Diffstat (limited to 'drivers/irqchip')
-rw-r--r-- | drivers/irqchip/irq-dw-apb-ictl.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/irqchip/irq-dw-apb-ictl.c b/drivers/irqchip/irq-dw-apb-ictl.c index fcc338584bda..c136b67740de 100644 --- a/drivers/irqchip/irq-dw-apb-ictl.c +++ b/drivers/irqchip/irq-dw-apb-ictl.c @@ -115,6 +115,7 @@ static int __init dw_apb_ictl_init(struct device_node *np, ret = irq_alloc_domain_generic_chips(domain, 32, (nrirqs > 32) ? 2 : 1, np->name, handle_level_irq, clr, 0, + IRQ_GC_MASK_CACHE_PER_TYPE | IRQ_GC_INIT_MASK_CACHE); if (ret) { pr_err("%s: unable to alloc irq domain gc\n", np->full_name); |