diff options
| author | William Breathitt Gray <william.gray@linaro.org> | 2023-04-06 10:40:15 -0400 |
|---|---|---|
| committer | Jonathan Cameron <Jonathan.Cameron@huawei.com> | 2023-04-10 12:26:34 +0100 |
| commit | 7c95a3f51a54db694d3eeef60e77e3a8558ef25e (patch) | |
| tree | 95d5ffa2c3e272de0eaf10ab94d4b9f295c91129 /drivers/iio | |
| parent | c7301b848191f18719c5a6247300998269059c0b (diff) | |
| download | lwn-7c95a3f51a54db694d3eeef60e77e3a8558ef25e.tar.gz lwn-7c95a3f51a54db694d3eeef60e77e3a8558ef25e.zip | |
iio: addac: stx104: Use regmap_read_poll_timeout() for conversion poll
ADC sample captures take a certain amount of time to complete after
initiated; this conversion time range can be anywhere from 5
microseconds to 53.68 seconds depending on the configuration of the
Analog Input Frame Timer register. When the conversion is in progress,
the ADC Status register CNV bit is high. Call regmap_read_poll_timeout()
to poll until the ADC conversion is completed (or timeout if more than
53.68 seconds passes).
Suggested-by: Jonathan Cameron <jic23@kernel.org>
Signed-off-by: William Breathitt Gray <william.gray@linaro.org>
Link: https://lore.kernel.org/r/9ef433f107afd1d4dcd2d97ef0e932d7045c2bbd.1680790580.git.william.gray@linaro.org
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Diffstat (limited to 'drivers/iio')
| -rw-r--r-- | drivers/iio/addac/stx104.c | 22 |
1 files changed, 13 insertions, 9 deletions
diff --git a/drivers/iio/addac/stx104.c b/drivers/iio/addac/stx104.c index 798f98a8872e..d1f7ce033b46 100644 --- a/drivers/iio/addac/stx104.c +++ b/drivers/iio/addac/stx104.c @@ -205,21 +205,25 @@ static int stx104_read_raw(struct iio_dev *indio_dev, return err; } - /* trigger ADC sample capture by writing to the 8-bit - * Software Strobe Register and wait for completion + /* + * Trigger ADC sample capture by writing to the 8-bit Software Strobe Register and + * wait for completion; the conversion time range is 5 microseconds to 53.68 seconds + * in steps of 25 nanoseconds. The actual Analog Input Frame Timer time interval is + * calculated as: + * ai_time_frame_ns = ( AIFT + 1 ) * ( 25 nanoseconds ). + * Where 0 <= AIFT <= 2147483648. */ err = regmap_write(priv->aio_ctl_map, STX104_SOFTWARE_STROBE, 0); if (err) { mutex_unlock(&priv->lock); return err; } - do { - err = regmap_read(priv->aio_ctl_map, STX104_ADC_STATUS, &adc_status); - if (err) { - mutex_unlock(&priv->lock); - return err; - } - } while (u8_get_bits(adc_status, STX104_CNV)); + err = regmap_read_poll_timeout(priv->aio_ctl_map, STX104_ADC_STATUS, adc_status, + !u8_get_bits(adc_status, STX104_CNV), 0, 53687092); + if (err) { + mutex_unlock(&priv->lock); + return err; + } err = regmap_read(priv->aio_data_map, STX104_ADC_DATA, &value); if (err) { |