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authorMartin Blumenstingl <martin.blumenstingl@googlemail.com>2018-09-23 00:21:00 +0200
committerJonathan Cameron <Jonathan.Cameron@huawei.com>2018-09-29 12:26:07 +0100
commit3d9bf07a72f9257f081be7d4381cb70cf0d9426e (patch)
treebf162b49c39d21fde1c1f6ce300a8e9370020427 /drivers/iio/adc
parent5851b499de048c9e0ee1ef2e3fbd8d3d89cbdf18 (diff)
downloadlwn-3d9bf07a72f9257f081be7d4381cb70cf0d9426e.tar.gz
lwn-3d9bf07a72f9257f081be7d4381cb70cf0d9426e.zip
iio: adc: meson-saradc: remove #define MESON_SAR_ADC_DELTA_10_TS_C_SHIFT
This define is of no use because the driver is avoiding shifting bits by itself but using FIELD_GET/FIELD_PREP (which are using bit masks) instead. There is already a MESON_SAR_ADC_DELTA_10_TS_C_MASK bit mask so MESON_SAR_ADC_DELTA_10_TS_C_SHIFT was redundant. Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Diffstat (limited to 'drivers/iio/adc')
-rw-r--r--drivers/iio/adc/meson_saradc.c1
1 files changed, 0 insertions, 1 deletions
diff --git a/drivers/iio/adc/meson_saradc.c b/drivers/iio/adc/meson_saradc.c
index da2d16dfa63e..b97b06bf7713 100644
--- a/drivers/iio/adc/meson_saradc.c
+++ b/drivers/iio/adc/meson_saradc.c
@@ -148,7 +148,6 @@
#define MESON_SAR_ADC_DELTA_10_TS_REVE1 BIT(26)
#define MESON_SAR_ADC_DELTA_10_CHAN1_DELTA_VALUE_MASK GENMASK(25, 16)
#define MESON_SAR_ADC_DELTA_10_TS_REVE0 BIT(15)
- #define MESON_SAR_ADC_DELTA_10_TS_C_SHIFT 11
#define MESON_SAR_ADC_DELTA_10_TS_C_MASK GENMASK(14, 11)
#define MESON_SAR_ADC_DELTA_10_TS_VBG_EN BIT(10)
#define MESON_SAR_ADC_DELTA_10_CHAN0_DELTA_VALUE_MASK GENMASK(9, 0)