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authorMichel Thierry <michel.thierry@intel.com>2018-01-08 10:37:34 -0800
committerRodrigo Vivi <rodrigo.vivi@intel.com>2018-02-01 07:31:07 -0800
commit8466169ab9fe9f0c3412881116aca895feea6e70 (patch)
treefd1a8746dd5f8731ddb1361d01003cbcbf39a2b3 /drivers/gpu
parentcc753fbe1ac47560e1517e3e11fb0c8a3c95eef5 (diff)
downloadlwn-8466169ab9fe9f0c3412881116aca895feea6e70.tar.gz
lwn-8466169ab9fe9f0c3412881116aca895feea6e70.zip
drm/i915/gvt: Do not use I915_NUM_ENGINES to iterate over the mocs regs array
The mocs reg array is defined locally but then we iterate over its elements using I915_NUM_ENGINES. There is no 'hard' connection between I915_NUM_ENGINES and the regs array and there will be problems if either of them increases. Use the size of the mocs reg array instead to safely iterate over it. Signed-off-by: Michel Thierry <michel.thierry@intel.com> Cc: Weinan Li <weinan.z.li@intel.com> Cc: Zhenyu Wang <zhenyuw@linux.intel.com> Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Diffstat (limited to 'drivers/gpu')
-rw-r--r--drivers/gpu/drm/i915/gvt/mmio_context.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/gvt/mmio_context.c b/drivers/gpu/drm/i915/gvt/mmio_context.c
index 48ee61ac9bc5..73ad6e90e49d 100644
--- a/drivers/gpu/drm/i915/gvt/mmio_context.c
+++ b/drivers/gpu/drm/i915/gvt/mmio_context.c
@@ -167,7 +167,7 @@ static void load_render_mocs(struct drm_i915_private *dev_priv)
};
int ring_id, i;
- for (ring_id = 0; ring_id < I915_NUM_ENGINES; ring_id++) {
+ for (ring_id = 0; ring_id < ARRAY_SIZE(regs); ring_id++) {
offset.reg = regs[ring_id];
for (i = 0; i < 64; i++) {
gen9_render_mocs.control_table[ring_id][i] =