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authorAlex Deucher <alexander.deucher@amd.com>2014-11-17 15:08:17 -0500
committerJiri Slaby <jslaby@suse.cz>2015-01-26 14:39:24 +0100
commit5d531ee5e76b84da1c114dddd9077d1e3a2d1ff7 (patch)
tree181ad8839879092d724dae1fdef0cf37ef5f56f9 /drivers/gpu
parent2ae5f6c0b469c5eb92716f583b8d10f76f68a0b8 (diff)
downloadlwn-5d531ee5e76b84da1c114dddd9077d1e3a2d1ff7.tar.gz
lwn-5d531ee5e76b84da1c114dddd9077d1e3a2d1ff7.zip
drm/radeon: work around a hw bug in MGCG on CIK
commit 4bb62c95a7e781a238b2ab374f34b1bf91e01ddc upstream. Always need to set bit 0 of RLC_CGTT_MGCG_OVERRIDE to avoid unreliable doorbell updates in some cases. Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Jiri Slaby <jslaby@suse.cz>
Diffstat (limited to 'drivers/gpu')
-rw-r--r--drivers/gpu/drm/radeon/cik.c3
1 files changed, 2 insertions, 1 deletions
diff --git a/drivers/gpu/drm/radeon/cik.c b/drivers/gpu/drm/radeon/cik.c
index 0fc5fd6b3b41..cdc7f408bd18 100644
--- a/drivers/gpu/drm/radeon/cik.c
+++ b/drivers/gpu/drm/radeon/cik.c
@@ -5167,6 +5167,7 @@ static void cik_enable_mgcg(struct radeon_device *rdev, bool enable)
}
orig = data = RREG32(RLC_CGTT_MGCG_OVERRIDE);
+ data |= 0x00000001;
data &= 0xfffffffd;
if (orig != data)
WREG32(RLC_CGTT_MGCG_OVERRIDE, data);
@@ -5198,7 +5199,7 @@ static void cik_enable_mgcg(struct radeon_device *rdev, bool enable)
}
} else {
orig = data = RREG32(RLC_CGTT_MGCG_OVERRIDE);
- data |= 0x00000002;
+ data |= 0x00000003;
if (orig != data)
WREG32(RLC_CGTT_MGCG_OVERRIDE, data);