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| author | Mika Kahola <mika.kahola@intel.com> | 2015-04-29 09:17:40 +0300 |
|---|---|---|
| committer | Daniel Vetter <daniel.vetter@ffwll.ch> | 2015-05-08 13:03:27 +0200 |
| commit | 5fa836a9d85975c5f0f1219669523c1f0ac64349 (patch) | |
| tree | 50af3ab42fecfc9498cfa83cfad544b0a598d3a8 /drivers/gpu/drm | |
| parent | 4e96c97742f4201edf1b0f8e1b1b6b2ac6ff33e7 (diff) | |
| download | lwn-5fa836a9d85975c5f0f1219669523c1f0ac64349.tar.gz lwn-5fa836a9d85975c5f0f1219669523c1f0ac64349.zip | |
drm/i915: DP link training optimization
This patch adds DP link training optimization by reusing the
previously trained values.
v2:
- rebase
V3:
- rebase
V4:
- when HPD long pulse is received, the flag is cleared
that indicates if DP link training is required or not
(based on Sivakumar's comment)
Signed-off-by: Mika Kahola <mika.kahola@intel.com>
Reviewed-by: Sivakumar Thulasimani <sivakumar.thulasimani@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm')
| -rw-r--r-- | drivers/gpu/drm/i915/intel_dp.c | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c index 1af97adadde8..7c3dbd465c78 100644 --- a/drivers/gpu/drm/i915/intel_dp.c +++ b/drivers/gpu/drm/i915/intel_dp.c @@ -3794,7 +3794,7 @@ intel_dp_complete_link_train(struct intel_dp *intel_dp) intel_dp->DP = DP; if (channel_eq) { - intel_dp->train_set_valid = is_edp(intel_dp); + intel_dp->train_set_valid = true; DRM_DEBUG_KMS("Channel EQ done. DP Training successful\n"); } } @@ -4858,6 +4858,8 @@ intel_dp_hpd_pulse(struct intel_digital_port *intel_dig_port, bool long_hpd) intel_display_power_get(dev_priv, power_domain); if (long_hpd) { + /* indicate that we need to restart link training */ + intel_dp->train_set_valid = false; if (HAS_PCH_SPLIT(dev)) { if (!ibx_digital_port_connected(dev_priv, intel_dig_port)) |