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authorThierry Reding <treding@nvidia.com>2017-08-15 15:41:09 +0200
committerThierry Reding <treding@nvidia.com>2017-08-17 17:57:14 +0200
commit5c5f13016d2f4d5144418bec57a75490c5f9fc96 (patch)
treea1f95cbcd0ad4fc0830095ea3dd3188db27d6eb5 /drivers/gpu/drm/tegra/sor.c
parent7efe20cf11655e860ae2852ebefebff244ddabb6 (diff)
downloadlwn-5c5f13016d2f4d5144418bec57a75490c5f9fc96.tar.gz
lwn-5c5f13016d2f4d5144418bec57a75490c5f9fc96.zip
drm/tegra: sor: Use unsigned int for register offsets
Register offsets are usually fairly small numbers, so an unsigned int is more than enough to represent them. Signed-off-by: Thierry Reding <treding@nvidia.com>
Diffstat (limited to 'drivers/gpu/drm/tegra/sor.c')
-rw-r--r--drivers/gpu/drm/tegra/sor.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/gpu/drm/tegra/sor.c b/drivers/gpu/drm/tegra/sor.c
index a8f528925009..d0f189c5171d 100644
--- a/drivers/gpu/drm/tegra/sor.c
+++ b/drivers/gpu/drm/tegra/sor.c
@@ -232,13 +232,13 @@ static inline struct tegra_sor *to_sor(struct tegra_output *output)
return container_of(output, struct tegra_sor, output);
}
-static inline u32 tegra_sor_readl(struct tegra_sor *sor, unsigned long offset)
+static inline u32 tegra_sor_readl(struct tegra_sor *sor, unsigned int offset)
{
return readl(sor->regs + (offset << 2));
}
static inline void tegra_sor_writel(struct tegra_sor *sor, u32 value,
- unsigned long offset)
+ unsigned int offset)
{
writel(value, sor->regs + (offset << 2));
}