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authorAlex Deucher <alexander.deucher@amd.com>2013-02-26 11:26:51 -0500
committerAlex Deucher <alexander.deucher@amd.com>2013-04-23 18:03:55 -0400
commit2e1b65f98bcaea6544d8781c3b34c631fcebe29a (patch)
tree57d2f6e9fb9f616dd99d0d828a63b4b056896287 /drivers/gpu/drm/radeon/radeon.h
parent79b52d6a7085a3e430c6de450a5847fdbe04159b (diff)
downloadlwn-2e1b65f98bcaea6544d8781c3b34c631fcebe29a.tar.gz
lwn-2e1b65f98bcaea6544d8781c3b34c631fcebe29a.zip
drm/radeon: add helper function to support golden registers
Golden registers are arrays of register settings from the hw team that need to be initialized at asic startup. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/radeon/radeon.h')
-rw-r--r--drivers/gpu/drm/radeon/radeon.h3
1 files changed, 3 insertions, 0 deletions
diff --git a/drivers/gpu/drm/radeon/radeon.h b/drivers/gpu/drm/radeon/radeon.h
index 856a67d5bd9b..d6c8cbaa8693 100644
--- a/drivers/gpu/drm/radeon/radeon.h
+++ b/drivers/gpu/drm/radeon/radeon.h
@@ -1946,6 +1946,9 @@ extern void radeon_gtt_location(struct radeon_device *rdev, struct radeon_mc *mc
extern int radeon_resume_kms(struct drm_device *dev);
extern int radeon_suspend_kms(struct drm_device *dev, pm_message_t state);
extern void radeon_ttm_set_active_vram_size(struct radeon_device *rdev, u64 size);
+extern void radeon_program_register_sequence(struct radeon_device *rdev,
+ const u32 *registers,
+ const u32 array_size);
/*
* vm