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authorAlex Deucher <alexander.deucher@amd.com>2012-11-09 10:45:57 -0500
committerAlex Deucher <alexander.deucher@amd.com>2013-06-25 17:50:31 -0400
commita59781bbe528a0c2b0468d8baeea88a61d8b7e3c (patch)
tree4b0adc4978b4fc72ae26212a86930861a1a34278 /drivers/gpu/drm/radeon/radeon.h
parentf6796caee6fc0f97e8d38f5b8b060ab1433ae54e (diff)
downloadlwn-a59781bbe528a0c2b0468d8baeea88a61d8b7e3c.tar.gz
lwn-a59781bbe528a0c2b0468d8baeea88a61d8b7e3c.zip
drm/radeon: add support for interrupts on CIK (v5)
Todo: - handle interrupts for compute queues v2: add documentation v3: update to latest reset code v4: update to latest illegal CP handling v5: fix missing break in interrupt handler switch statement Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/radeon/radeon.h')
-rw-r--r--drivers/gpu/drm/radeon/radeon.h11
1 files changed, 11 insertions, 0 deletions
diff --git a/drivers/gpu/drm/radeon/radeon.h b/drivers/gpu/drm/radeon/radeon.h
index 1c06c47bf4bd..e09157beeef0 100644
--- a/drivers/gpu/drm/radeon/radeon.h
+++ b/drivers/gpu/drm/radeon/radeon.h
@@ -600,10 +600,21 @@ struct evergreen_irq_stat_regs {
u32 afmt_status6;
};
+struct cik_irq_stat_regs {
+ u32 disp_int;
+ u32 disp_int_cont;
+ u32 disp_int_cont2;
+ u32 disp_int_cont3;
+ u32 disp_int_cont4;
+ u32 disp_int_cont5;
+ u32 disp_int_cont6;
+};
+
union radeon_irq_stat_regs {
struct r500_irq_stat_regs r500;
struct r600_irq_stat_regs r600;
struct evergreen_irq_stat_regs evergreen;
+ struct cik_irq_stat_regs cik;
};
#define RADEON_MAX_HPD_PINS 6