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author | Alex Deucher <alexander.deucher@amd.com> | 2013-03-28 10:46:29 -0400 |
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committer | Alex Deucher <alexander.deucher@amd.com> | 2013-06-27 19:40:07 -0400 |
commit | 72dd2c54ee630701608c08fd85e0eaf75336e31c (patch) | |
tree | 4de60c6912f8a3db5b3df329c00d9415894d88c1 /drivers/gpu/drm/radeon/ni_dpm.c | |
parent | 2c48febb47c60df91775366eb8c65556a1cdb3c8 (diff) | |
download | lwn-72dd2c54ee630701608c08fd85e0eaf75336e31c.tar.gz lwn-72dd2c54ee630701608c08fd85e0eaf75336e31c.zip |
drm/radeon/dpm: add dpm_set_power_state failure output (7xx-ni)
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/radeon/ni_dpm.c')
-rw-r--r-- | drivers/gpu/drm/radeon/ni_dpm.c | 48 |
1 files changed, 36 insertions, 12 deletions
diff --git a/drivers/gpu/drm/radeon/ni_dpm.c b/drivers/gpu/drm/radeon/ni_dpm.c index 94007e4826a6..a1f128613cf4 100644 --- a/drivers/gpu/drm/radeon/ni_dpm.c +++ b/drivers/gpu/drm/radeon/ni_dpm.c @@ -3726,47 +3726,71 @@ int ni_dpm_set_power_state(struct radeon_device *rdev) int ret; ret = ni_restrict_performance_levels_before_switch(rdev); - if (ret) + if (ret) { + DRM_ERROR("ni_restrict_performance_levels_before_switch failed\n"); return ret; + } rv770_set_uvd_clock_before_set_eng_clock(rdev, new_ps, old_ps); ret = ni_enable_power_containment(rdev, new_ps, false); - if (ret) + if (ret) { + DRM_ERROR("ni_enable_power_containment failed\n"); return ret; + } ret = ni_enable_smc_cac(rdev, new_ps, false); - if (ret) + if (ret) { + DRM_ERROR("ni_enable_smc_cac failed\n"); return ret; + } ret = rv770_halt_smc(rdev); - if (ret) + if (ret) { + DRM_ERROR("rv770_halt_smc failed\n"); return ret; + } if (eg_pi->smu_uvd_hs) btc_notify_uvd_to_smc(rdev, new_ps); ret = ni_upload_sw_state(rdev, new_ps); - if (ret) + if (ret) { + DRM_ERROR("ni_upload_sw_state failed\n"); return ret; + } if (eg_pi->dynamic_ac_timing) { ret = ni_upload_mc_reg_table(rdev, new_ps); - if (ret) + if (ret) { + DRM_ERROR("ni_upload_mc_reg_table failed\n"); return ret; + } } ret = ni_program_memory_timing_parameters(rdev, new_ps); - if (ret) + if (ret) { + DRM_ERROR("ni_program_memory_timing_parameters failed\n"); return ret; + } ret = ni_populate_smc_tdp_limits(rdev, new_ps); - if (ret) + if (ret) { + DRM_ERROR("ni_populate_smc_tdp_limits failed\n"); return ret; + } ret = rv770_resume_smc(rdev); - if (ret) + if (ret) { + DRM_ERROR("rv770_resume_smc failed\n"); return ret; + } ret = rv770_set_sw_state(rdev); - if (ret) + if (ret) { + DRM_ERROR("rv770_set_sw_state failed\n"); return ret; + } rv770_set_uvd_clock_after_set_eng_clock(rdev, new_ps, old_ps); ret = ni_enable_smc_cac(rdev, new_ps, true); - if (ret) + if (ret) { + DRM_ERROR("ni_enable_smc_cac failed\n"); return ret; + } ret = ni_enable_power_containment(rdev, new_ps, true); - if (ret) + if (ret) { + DRM_ERROR("ni_enable_power_containment failed\n"); return ret; + } #if 0 /* XXX */ |