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authorIlija Hadzic <ihadzic@research.bell-labs.com>2011-09-20 10:22:58 -0400
committerDave Airlie <airlied@redhat.com>2011-10-12 14:44:00 +0100
commitb07759bf41d52aaecd5de92c7d725d6834b23349 (patch)
treec66e43d4f656cb7438f516e6f7438dc531aa74ff /drivers/gpu/drm/radeon/evergreen.c
parentcd54033ae9dabad389c09e0f338e9d8c1465827f (diff)
downloadlwn-b07759bf41d52aaecd5de92c7d725d6834b23349.tar.gz
lwn-b07759bf41d52aaecd5de92c7d725d6834b23349.zip
drm/radeon: allow pcie gen2 speed on Cayman
Looks like the same pcie gen2 speed initialization for Evergreen also works on Cayman and seems to come up fine, so enable it if the module parameter says so Signed-off-by: Ilija Hadzic <ihadzic@research.bell-labs.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
Diffstat (limited to 'drivers/gpu/drm/radeon/evergreen.c')
-rw-r--r--drivers/gpu/drm/radeon/evergreen.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/gpu/drm/radeon/evergreen.c b/drivers/gpu/drm/radeon/evergreen.c
index 1fc8650079db..5df39bf9ee49 100644
--- a/drivers/gpu/drm/radeon/evergreen.c
+++ b/drivers/gpu/drm/radeon/evergreen.c
@@ -39,7 +39,7 @@
static void evergreen_gpu_init(struct radeon_device *rdev);
void evergreen_fini(struct radeon_device *rdev);
-static void evergreen_pcie_gen2_enable(struct radeon_device *rdev);
+void evergreen_pcie_gen2_enable(struct radeon_device *rdev);
void evergreen_fix_pci_max_read_req_size(struct radeon_device *rdev)
{
@@ -3317,7 +3317,7 @@ void evergreen_fini(struct radeon_device *rdev)
rdev->bios = NULL;
}
-static void evergreen_pcie_gen2_enable(struct radeon_device *rdev)
+void evergreen_pcie_gen2_enable(struct radeon_device *rdev)
{
u32 link_width_cntl, speed_cntl;