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authorAlex Deucher <alexander.deucher@amd.com>2014-11-17 15:08:17 -0500
committerAlex Deucher <alexander.deucher@amd.com>2014-11-20 11:11:43 -0500
commit4bb62c95a7e781a238b2ab374f34b1bf91e01ddc (patch)
tree9c0a3e022237745bd947eae81044feac041118da /drivers/gpu/drm/radeon/cik.c
parent3feba08d79c32777a845c3c8a4ab93092bdf6f19 (diff)
downloadlwn-4bb62c95a7e781a238b2ab374f34b1bf91e01ddc.tar.gz
lwn-4bb62c95a7e781a238b2ab374f34b1bf91e01ddc.zip
drm/radeon: work around a hw bug in MGCG on CIK
Always need to set bit 0 of RLC_CGTT_MGCG_OVERRIDE to avoid unreliable doorbell updates in some cases. Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
Diffstat (limited to 'drivers/gpu/drm/radeon/cik.c')
-rw-r--r--drivers/gpu/drm/radeon/cik.c3
1 files changed, 2 insertions, 1 deletions
diff --git a/drivers/gpu/drm/radeon/cik.c b/drivers/gpu/drm/radeon/cik.c
index bce73b6203ac..cef4cb7e5438 100644
--- a/drivers/gpu/drm/radeon/cik.c
+++ b/drivers/gpu/drm/radeon/cik.c
@@ -6344,6 +6344,7 @@ static void cik_enable_mgcg(struct radeon_device *rdev, bool enable)
}
orig = data = RREG32(RLC_CGTT_MGCG_OVERRIDE);
+ data |= 0x00000001;
data &= 0xfffffffd;
if (orig != data)
WREG32(RLC_CGTT_MGCG_OVERRIDE, data);
@@ -6377,7 +6378,7 @@ static void cik_enable_mgcg(struct radeon_device *rdev, bool enable)
}
} else {
orig = data = RREG32(RLC_CGTT_MGCG_OVERRIDE);
- data |= 0x00000002;
+ data |= 0x00000003;
if (orig != data)
WREG32(RLC_CGTT_MGCG_OVERRIDE, data);