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author | Ben Skeggs <bskeggs@redhat.com> | 2013-03-04 13:01:21 +1000 |
---|---|---|
committer | Ben Skeggs <bskeggs@redhat.com> | 2013-07-01 13:44:04 +1000 |
commit | dceef5d87cc01358cc1434416f3272e2ddc3d97a (patch) | |
tree | 6d073077600739f296087e0e38d65e21d7074873 /drivers/gpu/drm/nouveau/nv50_display.c | |
parent | 54ecff3e1ad22fd44443acde7f27f213758fdddc (diff) | |
download | lwn-dceef5d87cc01358cc1434416f3272e2ddc3d97a.tar.gz lwn-dceef5d87cc01358cc1434416f3272e2ddc3d97a.zip |
drm/nouveau/fb: initialise vram controller as pfb sub-object
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Diffstat (limited to 'drivers/gpu/drm/nouveau/nv50_display.c')
-rw-r--r-- | drivers/gpu/drm/nouveau/nv50_display.c | 18 |
1 files changed, 9 insertions, 9 deletions
diff --git a/drivers/gpu/drm/nouveau/nv50_display.c b/drivers/gpu/drm/nouveau/nv50_display.c index dd5e01f89f28..54dc6355b0c2 100644 --- a/drivers/gpu/drm/nouveau/nv50_display.c +++ b/drivers/gpu/drm/nouveau/nv50_display.c @@ -159,7 +159,7 @@ nv50_dmac_create_fbdma(struct nouveau_object *core, u32 parent) .flags = NV_DMA_TARGET_VRAM | NV_DMA_ACCESS_RDWR, .start = 0, - .limit = pfb->ram.size - 1, + .limit = pfb->ram->size - 1, .conf0 = NV50_DMA_CONF0_ENABLE | NV50_DMA_CONF0_PART_256, }, sizeof(struct nv_dma_class), &object); @@ -172,7 +172,7 @@ nv50_dmac_create_fbdma(struct nouveau_object *core, u32 parent) .flags = NV_DMA_TARGET_VRAM | NV_DMA_ACCESS_RDWR, .start = 0, - .limit = pfb->ram.size - 1, + .limit = pfb->ram->size - 1, .conf0 = NV50_DMA_CONF0_ENABLE | 0x70 | NV50_DMA_CONF0_PART_256, }, sizeof(struct nv_dma_class), &object); @@ -185,7 +185,7 @@ nv50_dmac_create_fbdma(struct nouveau_object *core, u32 parent) .flags = NV_DMA_TARGET_VRAM | NV_DMA_ACCESS_RDWR, .start = 0, - .limit = pfb->ram.size - 1, + .limit = pfb->ram->size - 1, .conf0 = NV50_DMA_CONF0_ENABLE | 0x7a | NV50_DMA_CONF0_PART_256, }, sizeof(struct nv_dma_class), &object); @@ -204,7 +204,7 @@ nvc0_dmac_create_fbdma(struct nouveau_object *core, u32 parent) .flags = NV_DMA_TARGET_VRAM | NV_DMA_ACCESS_RDWR, .start = 0, - .limit = pfb->ram.size - 1, + .limit = pfb->ram->size - 1, .conf0 = NVC0_DMA_CONF0_ENABLE, }, sizeof(struct nv_dma_class), &object); if (ret) @@ -216,7 +216,7 @@ nvc0_dmac_create_fbdma(struct nouveau_object *core, u32 parent) .flags = NV_DMA_TARGET_VRAM | NV_DMA_ACCESS_RDWR, .start = 0, - .limit = pfb->ram.size - 1, + .limit = pfb->ram->size - 1, .conf0 = NVC0_DMA_CONF0_ENABLE | 0xfe, }, sizeof(struct nv_dma_class), &object); if (ret) @@ -228,7 +228,7 @@ nvc0_dmac_create_fbdma(struct nouveau_object *core, u32 parent) .flags = NV_DMA_TARGET_VRAM | NV_DMA_ACCESS_RDWR, .start = 0, - .limit = pfb->ram.size - 1, + .limit = pfb->ram->size - 1, .conf0 = NVC0_DMA_CONF0_ENABLE | 0xfe, }, sizeof(struct nv_dma_class), &object); return ret; @@ -246,7 +246,7 @@ nvd0_dmac_create_fbdma(struct nouveau_object *core, u32 parent) .flags = NV_DMA_TARGET_VRAM | NV_DMA_ACCESS_RDWR, .start = 0, - .limit = pfb->ram.size - 1, + .limit = pfb->ram->size - 1, .conf0 = NVD0_DMA_CONF0_ENABLE | NVD0_DMA_CONF0_PAGE_LP, }, sizeof(struct nv_dma_class), &object); @@ -259,7 +259,7 @@ nvd0_dmac_create_fbdma(struct nouveau_object *core, u32 parent) .flags = NV_DMA_TARGET_VRAM | NV_DMA_ACCESS_RDWR, .start = 0, - .limit = pfb->ram.size - 1, + .limit = pfb->ram->size - 1, .conf0 = NVD0_DMA_CONF0_ENABLE | 0xfe | NVD0_DMA_CONF0_PAGE_LP, }, sizeof(struct nv_dma_class), &object); @@ -316,7 +316,7 @@ nv50_dmac_create(struct nouveau_object *core, u32 bclass, u8 head, .flags = NV_DMA_TARGET_VRAM | NV_DMA_ACCESS_RDWR, .start = 0, - .limit = pfb->ram.size - 1, + .limit = pfb->ram->size - 1, }, sizeof(struct nv_dma_class), &object); if (ret) return ret; |