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author | Ben Skeggs <bskeggs@redhat.com> | 2022-06-01 20:47:52 +1000 |
---|---|---|
committer | Ben Skeggs <bskeggs@redhat.com> | 2022-11-09 10:44:58 +1000 |
commit | 2541626cfb794e57ba0575a6920826f591f7ced0 (patch) | |
tree | de53edee6959486a2ce6e8085820680cc14a41ba /drivers/gpu/drm/nouveau/include | |
parent | e3f324956a32d08a9361ee1e3beca383f1b01eba (diff) | |
download | lwn-2541626cfb794e57ba0575a6920826f591f7ced0.tar.gz lwn-2541626cfb794e57ba0575a6920826f591f7ced0.zip |
drm/nouveau/acr: use common falcon HS FW code for ACR FWs
Adds context binding and support for FWs with a bootloader to the code
that was added to load VPR scrubber HS binaries, and ports ACR over to
using all of it.
- gv100 split from gp108 to handle FW exit status differences
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Lyude Paul <lyude@redhat.com>
Diffstat (limited to 'drivers/gpu/drm/nouveau/include')
4 files changed, 37 insertions, 27 deletions
diff --git a/drivers/gpu/drm/nouveau/include/nvkm/core/falcon.h b/drivers/gpu/drm/nouveau/include/nvkm/core/falcon.h index d8fd2cbd2872..4c8b668bacb4 100644 --- a/drivers/gpu/drm/nouveau/include/nvkm/core/falcon.h +++ b/drivers/gpu/drm/nouveau/include/nvkm/core/falcon.h @@ -6,6 +6,7 @@ enum nvkm_falcon_mem { IMEM, DMEM, + EMEM, }; static inline const char * @@ -14,6 +15,7 @@ nvkm_falcon_mem(enum nvkm_falcon_mem mem) switch (mem) { case IMEM: return "imem"; case DMEM: return "dmem"; + case EMEM: return "emem"; default: WARN_ON(1); return "?mem"; @@ -25,6 +27,8 @@ struct nvkm_falcon_func_pio { int max; void (*wr_init)(struct nvkm_falcon *, u8 port, bool sec, u32 mem_base); void (*wr)(struct nvkm_falcon *, u8 port, const u8 *img, int len, u16 tag); + void (*rd_init)(struct nvkm_falcon *, u8 port, u32 mem_base); + void (*rd)(struct nvkm_falcon *, u8 port, const u8 *img, int len); }; int nvkm_falcon_ctor(const struct nvkm_falcon_func *, struct nvkm_subdev *owner, @@ -33,27 +37,25 @@ void nvkm_falcon_dtor(struct nvkm_falcon *); int nvkm_falcon_reset(struct nvkm_falcon *); int nvkm_falcon_pio_wr(struct nvkm_falcon *, const u8 *img, u32 img_base, u8 port, enum nvkm_falcon_mem mem_type, u32 mem_base, int len, u16 tag, bool sec); +int nvkm_falcon_pio_rd(struct nvkm_falcon *, u8 port, enum nvkm_falcon_mem type, u32 mem_base, + const u8 *img, u32 img_base, int len); int gm200_flcn_reset_wait_mem_scrubbing(struct nvkm_falcon *); int gm200_flcn_disable(struct nvkm_falcon *); int gm200_flcn_enable(struct nvkm_falcon *); +void gm200_flcn_bind_inst(struct nvkm_falcon *, int, u64); +int gm200_flcn_bind_stat(struct nvkm_falcon *, bool); extern const struct nvkm_falcon_func_pio gm200_flcn_imem_pio; extern const struct nvkm_falcon_func_pio gm200_flcn_dmem_pio; int gp102_flcn_reset_eng(struct nvkm_falcon *); +extern const struct nvkm_falcon_func_pio gp102_flcn_emem_pio; void nvkm_falcon_v1_load_imem(struct nvkm_falcon *, void *, u32, u32, u16, u8, bool); void nvkm_falcon_v1_load_dmem(struct nvkm_falcon *, void *, u32, u32, u8); -void nvkm_falcon_v1_read_dmem(struct nvkm_falcon *, u32, u32, u8, void *); -void nvkm_falcon_v1_bind_context(struct nvkm_falcon *, struct nvkm_memory *); -int nvkm_falcon_v1_wait_for_halt(struct nvkm_falcon *, u32); -int nvkm_falcon_v1_clear_interrupt(struct nvkm_falcon *, u32); -void nvkm_falcon_v1_set_start_addr(struct nvkm_falcon *, u32 start_addr); void nvkm_falcon_v1_start(struct nvkm_falcon *); -void gp102_sec2_flcn_bind_context(struct nvkm_falcon *, struct nvkm_memory *); - #define FLCN_PRINTK(f,l,p,fmt,a...) ({ \ if ((f)->owner->name != (f)->name) \ nvkm_printk___((f)->owner, (f)->user, NV_DBG_##l, p, "%s:"fmt, (f)->name, ##a); \ @@ -70,7 +72,9 @@ struct nvkm_falcon_fw { const struct nvkm_falcon_fw_func { int (*signature)(struct nvkm_falcon_fw *, u32 *sig_base_src); int (*reset)(struct nvkm_falcon_fw *); + int (*setup)(struct nvkm_falcon_fw *); int (*load)(struct nvkm_falcon_fw *); + int (*load_bld)(struct nvkm_falcon_fw *); int (*boot)(struct nvkm_falcon_fw *, u32 *mbox0, u32 *mbox1, u32 mbox0_ok, u32 irqsclr); } *func; @@ -96,11 +100,14 @@ struct nvkm_falcon_fw { u32 dmem_size; u32 dmem_sign; + u8 *boot; + u32 boot_size; u32 boot_addr; struct nvkm_falcon *falcon; struct nvkm_memory *inst; struct nvkm_vmm *vmm; + struct nvkm_vma *vma; }; int nvkm_falcon_fw_ctor(const struct nvkm_falcon_fw_func *, const char *name, struct nvkm_device *, diff --git a/drivers/gpu/drm/nouveau/include/nvkm/core/firmware.h b/drivers/gpu/drm/nouveau/include/nvkm/core/firmware.h index 8453025891a5..d4e507e252b1 100644 --- a/drivers/gpu/drm/nouveau/include/nvkm/core/firmware.h +++ b/drivers/gpu/drm/nouveau/include/nvkm/core/firmware.h @@ -1,6 +1,7 @@ /* SPDX-License-Identifier: MIT */ #ifndef __NVKM_FIRMWARE_H__ #define __NVKM_FIRMWARE_H__ +#include <core/memory.h> #include <core/option.h> #include <core/subdev.h> @@ -8,6 +9,7 @@ struct nvkm_firmware { const struct nvkm_firmware_func { enum nvkm_firmware_type { NVKM_FIRMWARE_IMG_RAM, + NVKM_FIRMWARE_IMG_DMA, } type; } *func; const char *name; @@ -15,6 +17,12 @@ struct nvkm_firmware { int len; u8 *img; + u64 phys; + + struct nvkm_firmware_mem { + struct nvkm_memory memory; + struct scatterlist sgl; + } mem; }; int nvkm_firmware_ctor(const struct nvkm_firmware_func *, const char *name, struct nvkm_device *, diff --git a/drivers/gpu/drm/nouveau/include/nvkm/engine/falcon.h b/drivers/gpu/drm/nouveau/include/nvkm/engine/falcon.h index ca751199379e..f576ca246d10 100644 --- a/drivers/gpu/drm/nouveau/include/nvkm/engine/falcon.h +++ b/drivers/gpu/drm/nouveau/include/nvkm/engine/falcon.h @@ -64,9 +64,22 @@ struct nvkm_falcon_func { int (*reset_wait_mem_scrubbing)(struct nvkm_falcon *); u32 debug; + void (*bind_inst)(struct nvkm_falcon *, int target, u64 addr); + int (*bind_stat)(struct nvkm_falcon *, bool intr); + bool bind_intr; + const struct nvkm_falcon_func_pio *imem_pio; const struct nvkm_falcon_func_pio *dmem_pio; + u32 emem_addr; + const struct nvkm_falcon_func_pio *emem_pio; + + struct { + u32 head; + u32 tail; + u32 stride; + } cmdq, msgq; + struct { u32 *data; u32 size; @@ -78,24 +91,10 @@ struct nvkm_falcon_func { void (*init)(struct nvkm_falcon *); void (*intr)(struct nvkm_falcon *, struct nvkm_chan *); - u32 fbif; - void (*load_imem)(struct nvkm_falcon *, void *, u32, u32, u16, u8, bool); void (*load_dmem)(struct nvkm_falcon *, void *, u32, u32, u8); - void (*read_dmem)(struct nvkm_falcon *, u32, u32, u8, void *); - u32 emem_addr; - void (*bind_context)(struct nvkm_falcon *, struct nvkm_memory *); - int (*wait_for_halt)(struct nvkm_falcon *, u32); - int (*clear_interrupt)(struct nvkm_falcon *, u32); - void (*set_start_addr)(struct nvkm_falcon *, u32 start_addr); void (*start)(struct nvkm_falcon *); - struct { - u32 head; - u32 tail; - u32 stride; - } cmdq, msgq; - struct nvkm_sclass sclass[]; }; @@ -122,10 +121,5 @@ nvkm_falcon_mask(struct nvkm_falcon *falcon, u32 addr, u32 mask, u32 val) void nvkm_falcon_load_imem(struct nvkm_falcon *, void *, u32, u32, u16, u8, bool); void nvkm_falcon_load_dmem(struct nvkm_falcon *, void *, u32, u32, u8); -void nvkm_falcon_read_dmem(struct nvkm_falcon *, u32, u32, u8, void *); -void nvkm_falcon_bind_context(struct nvkm_falcon *, struct nvkm_memory *); -void nvkm_falcon_set_start_addr(struct nvkm_falcon *, u32); void nvkm_falcon_start(struct nvkm_falcon *); -int nvkm_falcon_wait_for_halt(struct nvkm_falcon *, u32); -int nvkm_falcon_clear_interrupt(struct nvkm_falcon *, u32); #endif diff --git a/drivers/gpu/drm/nouveau/include/nvkm/subdev/acr.h b/drivers/gpu/drm/nouveau/include/nvkm/subdev/acr.h index fe5024b6d0f3..12c0b8395262 100644 --- a/drivers/gpu/drm/nouveau/include/nvkm/subdev/acr.h +++ b/drivers/gpu/drm/nouveau/include/nvkm/subdev/acr.h @@ -36,7 +36,7 @@ struct nvkm_acr { const struct nvkm_acr_func *func; struct nvkm_subdev subdev; - struct list_head hsfw, hsf; + struct list_head hsfw; struct list_head lsfw, lsf; u64 managed_falcons; @@ -65,6 +65,7 @@ int gm20b_acr_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct int gp102_acr_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_acr **); int gp108_acr_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_acr **); int gp10b_acr_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_acr **); +int gv100_acr_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_acr **); int tu102_acr_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_acr **); struct nvkm_acr_lsfw { |