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authorRob Clark <robdclark@chromium.org>2020-08-17 15:01:32 -0700
committerRob Clark <robdclark@chromium.org>2020-09-12 10:45:56 -0700
commit9cba4056a112785bf25e582fc6e7baa8346fe684 (patch)
tree9e582ffea6a39a2b3458aee3e151c755a2700161 /drivers/gpu/drm/msm/msm_gpu.h
parent69a9313b6617745bd841e1357e894abc85b9573d (diff)
downloadlwn-9cba4056a112785bf25e582fc6e7baa8346fe684.tar.gz
lwn-9cba4056a112785bf25e582fc6e7baa8346fe684.zip
drm/msm: Set adreno_smmu as gpu's drvdata
This will be populated by adreno-smmu, to provide a way for coordinating enabling/disabling TTBR0 translation. Signed-off-by: Rob Clark <robdclark@chromium.org> Reviewed-by: Jordan Crouse <jcrouse@codeaurora.org> Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Diffstat (limited to 'drivers/gpu/drm/msm/msm_gpu.h')
-rw-r--r--drivers/gpu/drm/msm/msm_gpu.h6
1 files changed, 5 insertions, 1 deletions
diff --git a/drivers/gpu/drm/msm/msm_gpu.h b/drivers/gpu/drm/msm/msm_gpu.h
index da1ae2263047..1f65aec57a8f 100644
--- a/drivers/gpu/drm/msm/msm_gpu.h
+++ b/drivers/gpu/drm/msm/msm_gpu.h
@@ -7,6 +7,7 @@
#ifndef __MSM_GPU_H__
#define __MSM_GPU_H__
+#include <linux/adreno-smmu-priv.h>
#include <linux/clk.h>
#include <linux/interconnect.h>
#include <linux/pm_opp.h>
@@ -74,6 +75,8 @@ struct msm_gpu {
struct platform_device *pdev;
const struct msm_gpu_funcs *funcs;
+ struct adreno_smmu_priv adreno_smmu;
+
/* performance counters (hw & sw): */
spinlock_t perf_lock;
bool perfcntr_active;
@@ -146,7 +149,8 @@ struct msm_gpu {
static inline struct msm_gpu *dev_to_gpu(struct device *dev)
{
- return dev_get_drvdata(dev);
+ struct adreno_smmu_priv *adreno_smmu = dev_get_drvdata(dev);
+ return container_of(adreno_smmu, struct msm_gpu, adreno_smmu);
}
/* It turns out that all targets use the same ringbuffer size */