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authorPeter Ross <pross@xvid.org>2012-01-28 14:49:25 +0100
committerDaniel Vetter <daniel.vetter@ffwll.ch>2012-02-10 17:28:48 +0100
commit8f4839e21ea9a8f7300daac1fa30bfec514c9a25 (patch)
tree747e1b867b2e8d3a9058ff2ffdbcecd2fc6d3315 /drivers/gpu/drm/i915/intel_sdvo.c
parent0529a0d9f0e702fd5215a493b7440be73f5941af (diff)
downloadlwn-8f4839e21ea9a8f7300daac1fa30bfec514c9a25.tar.gz
lwn-8f4839e21ea9a8f7300daac1fa30bfec514c9a25.zip
drm/i915: allow interlaced mode output on the SDVO connector
Signed-off-by: Peter Ross <pross@xvid.org> Reviewed-by: Eugeni Dodonov <eugeni.dodonov@intel.com> Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com> Tested-by: Paulo Zanoni <paulo.r.zanoni@intel.com> Tested-by: Christopher Egert <cme3000@gmail.com> Tested-by: Alfonso Fiore <alfonso.fiore@gmail.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm/i915/intel_sdvo.c')
-rw-r--r--drivers/gpu/drm/i915/intel_sdvo.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/intel_sdvo.c b/drivers/gpu/drm/i915/intel_sdvo.c
index 5b480bbad68c..80fb5da421f8 100644
--- a/drivers/gpu/drm/i915/intel_sdvo.c
+++ b/drivers/gpu/drm/i915/intel_sdvo.c
@@ -1984,7 +1984,7 @@ intel_sdvo_connector_init(struct intel_sdvo_connector *connector,
drm_connector_helper_add(&connector->base.base,
&intel_sdvo_connector_helper_funcs);
- connector->base.base.interlace_allowed = 0;
+ connector->base.base.interlace_allowed = 1;
connector->base.base.doublescan_allowed = 0;
connector->base.base.display_info.subpixel_order = SubPixelHorizontalRGB;